®
FAST CMOS OCTAL
BUFFER/LINE DRIVER
Integrated Device Technology, Inc.
IDT54/74FCT240/A/C
IDT54/74FCT241/A/C
IDT54/74FCT244/A/C
IDT54/74FCT540/A/C
IDT54/74FCT541/A/C
FEATURES:
• IDT54/74FCT240/241/244/540/541 equivalent to FAST
speed and drive
• IDT54/74FCT240A/241A/244A/540A/541A 25% faster
than FAST
• IDT54/74FCT240C/241C/244C/540C/541C up to 55%
faster than FAST
• I
OL
= 64mA (commercial) and 48mA (military)
• CMOS power levels (1mW typ. static)
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
• Meets or exceeds JEDEC Standard 18 specifications
TM
DESCRIPTION:
The IDT octal buffer/line drivers are built using an advanced
dual metal CMOS technology. The IDT54/74FCT240/A/C,
IDT54/74FCT241/A/C and IDT54/74FCT244/A/C are designed
to be employed as memory and address drivers, clock drivers
and bus-oriented transmitter/receivers which provide improved
board density.
The IDT54/74FCT540/A/C and IDT54/74FCT541/A/C are
similar in function to the IDT54/74FCT240/A/C and IDT54/
74FCT244/A/C, respectively, except that the inputs and out-
puts are on opposite sides of the package. This pinout
arrangement makes these devices especially useful as output
ports for microprocessors and as backplane drivers, allowing
ease of layout and greater board density.
FUNCTIONAL BLOCK DIAGRAMS
2529 cnv* 01–03
OE
A
OE
B
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
IDT54/74FCT240
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
IDT54/74FCT241/244
*OE
B
for 241, OE
B
for 244
OE
A
241 Only
OE
B
*
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
IDT54/74FCT540/541
*Logic diagram shown for 'FCT540.
'FCT541 is the non-inverting option.
2606 dwg 01–03
OE
A
OE
B
O
0
*
O
1
*
O
2
*
O
3
*
O
4
*
O
5
*
O
6
*
O
7
*
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4610/3
7.8
1
IDT54/74FCT240/241/244/540/541/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT240
OB
0
OE
A
V
CC
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
P20-1
D20-1 16
SO20-2 15
&
E20-1 14
13
12
11
17
V
CC
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
3 2
DA
1
OB
1
DA
2
OB
2
DA
3
4
5
6
7
8
DA
0
INDEX
1
20 19
18
17
16
15
OE
B
2529 cnv* 04–09
OA
0
DB
0
OA
1
DB
1
OA
2
L20-2
14
9 10 11 12 13
OB
3
GND
DB
3
OA
3
DB
2
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
IDT54/74FCT241/244
OB
0
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
GND
1
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
&
E20-1
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B
*
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
3 2
DA
1
OB
1
DA
2
OB
2
DA
3
4
5
6
7
8
9 10 11 12 13
L20-2
1
20 19
18
17
16
15
14
OA
0
DB
0
OA
1
DB
1
OA
2
GND
DB
3
OB
3
DA
0
INDEX
OA
3
OE
A
V
CC
DIP/SOIC/CERPACK
TOP VIEW
*OE
B
for 241,
OE
B
for 244
LCC
TOP VIEW
IDT54/74FCT540/541
OE
A
V
CC
1
OE
A
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
D
1
2
3
4
5
6
7
8
9
10
19
18
P20-1
D20-1 16
SO20-2 15
&
14
E20-1
13
12
11
17
OE
B
O
0
*
O
1
*
O
2
*
O
3
*
O
4
*
O
5
*
O
6
*
O
7
*
D
2
D
3
D
4
D
5
D
6
4
5
6
7
8
3 2
D
0
1
20
V
CC
20 19
18
17
16
15
14
OE
B
INDEX
DB
2
OE
B
*
O
0
*
O
1
*
O
2
*
O
3
*
O
4
*
L20-2
9 10 11 12 13
GND
O
7
*
O
6
*
D
7
DIP/SOIC/CERPACK
TOP VIEW
*
O
X
for 540, O
X
for 541
LCC
TOP VIEW
O
5
*
2606 cnv* 04–09
7.8
2
IDT54/74FCT240/241/244/540/541/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
OE
B (1)
Dxx
Oxx
NOTE:
1. OE
B
for 241 only.
FUNCTION TABLE
OE
A
L
L
H
2606 tbl 04
Description
3–State Output Enable Inputs (Active LOW)
3–State Output Enable Input (Active HIGH)
Inputs
Outputs
Inputs
(1)
OE
B
OE
B(2)
L
L
H
H
H
L
D
L
H
X
240
H
L
Z
Outputs
(1)
241 244 540
L
H
Z
L
H
541
L
H
Z
L
Z
H
Z
2606 tbl 05
NOTES:
1. H = High Voltage Level
X = Don’t Care
L = Low Voltage Level
Z = High Impedance
2. OE
B
for 241 only.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
(2)
Terminal Voltage
V
TERM
with Respect to
GND
(3)
Terminal Voltage
V
TERM
with Respect to
GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
P
T
Power Dissipation
I
OUT
DC Output
Current
Commercial
Military
–0.5 to +7.0 –0.5 to +7.0
Unit
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
Input
Capacitance
Output
Capacitance
(1)
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
2606 tbl 02
–0.5 to V
CC
–0.5 to V
CC
V
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°
C
°
C
°
C
W
mA
NOTE:
1. This parameter is measured at characterization but not tested.
NOTES:
2606 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
7.8
3
IDT54/74FCT240/241/244/540/541/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
OS
V
OH
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32
µ
A
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
I
OH
= –300
µ
A
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300
µ
A
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300
µ
A
I
OL
= 48mA MIL.
I
OL
= 64mA COM'L.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Off State (High Impedance)
Output Current
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2.0
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.55
0.55
2606 tbl 03
Unit
V
V
µ
A
µ
A
V
mA
V
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
7.8
4
IDT54/74FCT240/241/244/540/541/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
– 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND or
OE
A
= GND,
OE
B
= V
CC
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
A
=
OE
B
= GND or
OE
A
= GND,
OE
B
= V
CC
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 5MHz
50% Duty Cycle
OE
A
=
OE
B
= GND or
OE
A
= GND,
OE
B
= V
CC
Eight Bits Toggling
Min.
—
—
V
IN
≥
V
HC
V
IN
≤
V
LC
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2.0
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4.0
mA
—
2.0
5.0
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
3.2
6.5
(5)
—
5.2
14.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
2606 tbl 06
7.8
5
NXP MCU
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