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IDT71V016SA20YG38

产品描述Standard SRAM, 64KX16, 20ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44
产品类别存储   
文件大小482KB,共9页
制造商IDT (Integrated Device Technology)
标准  
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IDT71V016SA20YG38概述

Standard SRAM, 64KX16, 20ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44

IDT71V016SA20YG38规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码SOJ
包装说明SOJ, SOJ44,.44
针数44
Reach Compliance Codecompliant
ECCN代码3A991.B.2.B
Is SamacsysN
最长访问时间20 ns
I/O 类型COMMON
JESD-30 代码R-PDSO-J44
JESD-609代码e3
长度28.575 mm
内存密度1048576 bit
内存集成电路类型STANDARD SRAM
内存宽度16
湿度敏感等级3
功能数量1
端子数量44
字数65536 words
字数代码64000
工作模式ASYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织64KX16
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码SOJ
封装等效代码SOJ44,.44
封装形状RECTANGULAR
封装形式SMALL OUTLINE
并行/串行PARALLEL
峰值回流温度(摄氏度)260
电源3.3 V
认证状态Not Qualified
座面最大高度3.683 mm
最大待机电流0.002 A
最小待机电流3 V
最大压摆率0.08 mA
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)3 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn) - annealed
端子形式J BEND
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度10.16 mm
Base Number Matches1

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3.3V CMOS Static RAM
for Automotive Applications
1 Meg (64K x 16-Bit)
Features
IDT71V016SA
Description
The IDT71V016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs and automotive applications.
The IDT71V016 has an output enable pin which operates as fast
as 5ns, with address access times as fast as 10ns. All bidirectional
inputs and outputs of the IDT71V016 are LVTTL-compatible and operation
is from a single 3.3V supply. Fully static asynchronous circuitry is used,
requiring no clocks or refresh for operation.
The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic
SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
64K x 16 advanced high-speed CMOS Static RAM
Equal access and cycle times
— Automotive: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin Plastic SOJ, 44-pin TSOP, and
48-Ball Plastic FBGA packages
Functional Block Diagram
Output
Enable
Buffer
OE
A
0
– A
15
Address
Buffers
Row / Column
Decoders
I/O
15
Chip
Enable
Buffer
Sense
Amps
and
Write
Drivers
8
Low
Byte
I/O
Buffer
8
8
High
Byte
I/O
Buffer
8
CS
I/O
8
WE
Write
Enable
Buffer
64K x 16
Memory
Array
16
I/O
7
I/O
0
BHE
Byte
Enable
Buffers
BLE
6818 drw 01
DECEMBER 2004
1
©2004 Integrated Device Technology, Inc.
DSC-6818/00

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