TECHNOLOGIES
Product Data Sheet
2 W
ATTS
U
NREGULATED
DC/DC C
ONVERTER
HL02U
FEATURES
q
LOW COST
q
INTERNAL FILTERING
q
SURFACE MOUNT CONSTRUCTION
q
TEMPERATURE RANGE:
-25°C TO +70°C
q
HIGH EFFICIENCY
q
LOW OUTPUT NOISE
q
NON-CONDUCTIVE CASE
DESCRIPTION
The HL02U Series offers an extensive selection of input
and output voltages to choose from. These miniature,
unregulated DC/DC converters come in 24-pin DIP and
SMD packages. This small size is possible through the use
of surface mount manufacturing technologies.
The HL02U Series utilizes a 110KHz push-pull oscillator
in the input stage with internal filtering to reduce the
output noise while maintaining good efficiency.
The use of surface mount construction and automated
manufacturing processes increase consistency and reli-
ability while reducing overall cost.
ABSOLUTE MAXIMUM RATINGS
Internal Power Dissipation...................................................................0.90W
Short Circuit Duration.........................................................................30 Sec
Lead Temperature (soldering, 10 seconds max)..............................+300°C
*
*
Note: Refer to Reflow Profile for SMD Models.
ORDERING INFORMATION
HL02U xxyzz Y/Z /H
Device Family
HL Indicates DC/DC Converter
Model Number
Where:
xx = Input Voltage
y = Number or Outputs (Single "S", Dual "D")
zz = Output Voltage
Package Option
Screening Option
DIP Package only
Internet: http://www.cdpowerelectronics.com
Power Electronics Division, United States
3400 E Britannia Drive, Tucson, Arizona 85706
Phone: 800.547.2537 Fax: 520.770.9369
Power Electronics Division, Europe
C&D Technologies (Power Electronics) Ltd.
132 Shannon Industrial Estate, Shannon, Co. Clare, Ireland
Tel: +353.61.474.133
Fax:+353.61.474.141
Page 1
HL02UrevD,10/97
ELECTRICAL SPECIFICATIONS
Specifications typical at T
A
= +25°C, nominal input voltage, rated output current unless otherwise specified.
NOMINAL
INPUT
VOLTAGE
MODEL
HL02U05S05
HL02U05S12
HL02U05S15
HL02U12S05
HL02U12S12
HL02U12S15
HL02U15S05
HL02U15S12
HL02U15S15
HL02U24S05
HL02U24S12
HL02U24S15
HL02U05D05
HL02U05D12
HL02U05D15
HL02U12D05
HL02U12D12
HL02U12D15
HL02U15D05
HL02U15D12
HL02U15D15
HL02U24D05
HL02U24D12
HL02U24D15
(VDC)
5
5
5
12
12
12
15
15
15
24
24
24
5
5
5
12
12
12
15
15
15
24
24
24
RATED
OUTPUT
VOLTAGE
(VDC)
5
12
15
5
12
15
5
12
15
5
12
15
±5
±12
±15
±5
±12
±15
±5
±12
±15
±5
±12
±15
RATED
OUTPUT
CURRENT
(mA)
400
167
133
400
167
133
400
167
133
400
167
133
±200
±83
±67
±200
±83
±67
±200
±83
±67
±200
±83
±67
INPUT CURRENT
NO LOAD
(mA)
40
40
40
30
30
30
30
30
30
20
20
20
40
40
40
30
30
30
30
30
30
20
20
20
RATED LOAD
(mA)
540
480
480
230
210
210
190
170
170
125
110
110
540
490
490
230
210
210
190
170
170
120
110
110
EFFICIENCY
(%)
74
83
83
72
79
79
70
78
78
72
78
78
74
82
82
72
79
79
70
78
78
72
78
78
COMMON SPECIFICATIONS
Specifications typical at T
A
= +25°C, nominal input voltage, rated output current unless otherwise specified.
PARAMETER
INPUT
Voltage Range
CONDITIONS
MIN
4.75
11.4
14.25
22.8
TYP
5
12
15
24
30
MAX
5.25
12.6
15.75
26.2
100
UNITS
VDC
Reflected Ripple Current
ISOLATION
Rated Voltage
Test Voltage
Resistance
Capacitance
Leakage Current
OUTPUT
Rated Power
Voltage Setpoint Accuracy
Temperature Coefficent
Ripple & Noise
Line Regulation
Load Regulation
GENERAL
Switching Frequency
Package Weight
MTTF per MIL-HDBK-217, Rev. F
Ground Benign
mAp-p
60 Hz, 10 Seconds
500
500
1
25
2
2
±3
±0.02
50
10
±1
±3
110
12
V
ISO
= 240VAC, 60Hz
VDC
Vpk
GΩ
pF
µArms
W
%
%/°C
mVp-p
mVrms
%/%
%
kHz
g
kHr
kHr
±5
100
±1.5
±15
BW = DC to 10MHz
BW =10Hz to 2MHz
High Line to Low Line
Rated Load to 1/4 Load
Circuit Stress Method
T
A
= +25°C
T
A
= +70°C
-25
-40
-40
200
40
TEMPERATURE
Specification
Operation
Storage
+70
+85
+110
°C
°C
°C
Page 2
HL02UrevD,10/97
MECHANICAL
Package/Pinout "Y" and "Z"
1.285±0.010"
(32.64±0.25)
1514 13
1.285±0.010"
(32.64±0.25)
2423 22
2423 22
1514 13
TOP VIEWS
0.525±0.010"
(13.34±0.25)
0.525±0.010"
(13.34±0.25)
HL02UxxyzzY
HL02UxxyzzZ
0.695±0.015"
(17.65±0.38)
1 2 3
10 11 12
1 2 3
10 11 12
0.375±0.005"
(9.52±0.13)
0.015±0.005"
(0.38±0.13)
0.020±0.002"
(0.51±0.05)
SIDE VIEWS
0.375±0.005"
(9.52±0.13)
0.015±0.005"
(0.38±0.13)
0.100±0.010"
(2.54±0.25)
0.020±0.002"
(0.51±0.05)
0.100±0.010"
(2.54±0.25)
END VIEWS
0°-15°
0.600"
(15.24)
0.125+0.030"
-0.000"
(3.18+0.76)
(
-0.00)
0.014±0.002"
(0.36±0.05)
.015±.010"
(.38±.25)
DIP PACKAGE
NU = Do Not Use.
NC = No Internal Connection.
Duplicate pin functions are internally connected.
All dimensions are in inches (millimeters).
GRID: 0.100 inches (2.54 millimeters)
Typically Marked with: specific model ordered, date
code, job code and Logo.
SMD PACKAGE
PIN CONNECTIONS
PIN#
1
2
3
10
11
12
13
14
15
22
23
24
SINGLES
+VIN
NU
NU
-VOUT
+VOUT
-VIN
-VIN
+VOUT
-VOUT
NU
NU
+VIN
DUALS
+VIN
-VOUT
Common
Common
+VOUT
-VIN
-VIN
+VOUT
Common
Common
-VOUT
+VIN
RECOMMENDED LAND PATTERN
0.100"
(2.54)
2423 22
1514 13
RECOMMENDED REFLOW PROFILE
30 sec MAX
(>220°C)
250
235 °C MAX
220
200
190
TEMPERATURE (°C)
0.730"
(18.54)
0.040"
(1.02)
1 2 3
0.080"
(2.03)
150
10 11 12
100
1.150"
(29.21)
90 sec MAX
(>190°C)
50
TIME (seconds)
HL02UrevD,10/97
Page 3
T
YPICAL PERFORMANCE CURVES
250
LOAD CAPACITANCE vs INPUT RISE TIME
(All 5 Vout Models)
75
LOAD CAPACITANCE vs INPUT RISE TIME
(All 12 Vout Models)
Capacitance
(µF)
Capacitance
(µF)
200
150
100
50
0
0
5
10
(mS)
15
20
SAFE
OPERATING
AREA
60
45
30
15
0
0
5
10
(mS)
15
20
SAFE
OPERATING
AREA
LOAD CAPACITANCE vs INPUT RISE TIME
(All 15 Vout Models)
50
100%
EFFICIENCY vs LOAD
Capacitance
(µF)
40
30
20
10
0
0
5
10
(mS)
VOUT vs LOAD
(All Models Normalized)
15
20
SAFE
OPERATING
AREA
Efficiency
50%
10%
0%
25%
50%
Load
75%
100%
NOTES:
1.) When operated within the SAFE OPERATING AREA as defined
by the above curves, the output voltage of HL02U devices is
guaranteed to be within 95% of its steady-state value within 100
milliseconds after the input voltage has reached 95% of its steady-
state value.
2.) For dual output models, total load capacitance is the sum of the
capacitances on the plus and minus outputs.
110%
Vout
100%
90%
25%
50%
75%
Load
100%
125%
Page 4
HL02UrevD,10/97
FPGA/CPLD
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