TLP7820
Photocouplers
Optically Isolation Amplifiers
TLP7820
1. Applications
•
•
Motor phase and rail current sensing
Power inverter current and voltage sensing
2. General
The TLP7820 of isolation amplifiers is designed for current sensing in electronic motor drives. In a typical
implementation, motor currents flow through an external resistor and the resulting analog voltage drop is sensed
by the TLP7820.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Gain accuracy:
±0.5
% (Gain rank B)
Gain drift: 0.00012 V/V/% (typ.)
Nonlinearity (V
IN
=
±200
mV): 0.02 % (typ.)
Input offset voltage: 0.9 mV (typ.)
V
OUT
bandwidth (-3 dB): 230 kHz (typ.)
Operating temperature range: -40 to 105
Common-mode transient immunity: 15 kV/µs (min)
Safety standards
UL-approved: UL1577, File No.E67349
cUL-approved: CSA Component Acceptance Service No.5A File No.E67349
VDE-approved: EN60747-5-5, EN60065, EN60950-1, EN 62368-1 (Note 1)
CQC-approved: GB4943.1, GB8898 Japan Factory
Note 1: When a VDE approved type is needed, please designate the Option (D4)
(D4).
Start of commercial production
©2016-2017
Toshiba Electronic Devices & Storage Corporation
1
2015-09
2017-10-18
Rev.7.0
TLP7820
4. Packaging and Pin Assignment
11-6B1A
4.1. Pin Assignment
Pin No.
1
2
3
4
5
6
7
8
Symbol
V
DD1
V
IN+
V
IN-
GND1
GND2
V
OUT-
V
OUT+
V
DD2
Description
Input side supply voltage
Positive input
Negative input
Input side ground
Output side ground
Negative output
Positive output
Output side supply voltage
5. Internal Circuit (Note)
Note:
A 0.1-µF bypass capacitor must be connected between 1 and 4 pins and between 5 and 8 pins.
6. Principle of Operation
6.1. Mechanical Parameters
Characteristics
Height
Creepage distances
Clearance
Internal isolation thickness
Size
2.3 (max)
8.0 (min)
8.0 (min)
0.4 (min)
Unit
mm
©2016-2017
Toshiba Electronic Devices & Storage Corporation
2
2017-10-18
Rev.7.0
TLP7820
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
Characteristics
Supply Voltages
Steady-state input voltages
Two-second transient input voltages
Input power dissipation
Input power dissipation derating
Output voltages
Output power dissipation
Output power dissipation derating
Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
(10 s)
(AC, 60 s, R.H.
≤
60 %)
(T
a
≥
113.0
)
(T
a
≥
110.6
)
Symbol
V
DD1
, V
DD2
V
IN+
, V
IN-
V
IN+
, V
IN-
P
D
∆P
D
/∆T
a
V
OUT+
, V
OUT-
P
O
∆P
O
/∆T
a
T
opr
T
stg
T
sol
BV
S
(Note 1)
(Note 2)
Note
Rating
-0.5 to 6
-0.5 to V
DD1
+ 0.5
-6 to V
DD1
+ 0.5
72
-5.0
-0.5 to V
DD2
+ 0.5
60
-5.0
-40 to 105
-55 to 125
260
5000
Unit
V
V
V
mW
mW/
V
mW
mW/
Vrms
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note: Ceramic capacitors (0.1
µF)
should be connected between 1 and 4 pins and between 5 and 8 pins to stabilize
the operation. Otherwise, this photocoupler may not switch properly. The bypass capacitors should be placed
as close as possible to each pin.
Note 1:
≥
2 mm below seating plane.
Note 2: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
Note:
8. Recommended Operating Conditions (Note)
Characteristics
Input side supply voltage
Output side supply voltage
Analog input voltage
Ambient temperature
Symbol
V
DD1
V
DD2
V
IN+
, V
IN-
T
a
(Note 1), (Note 2)
Note
Min
4.5
3
-200
-40
Typ.
5
Max
5.5
5.5
200
105
mV
Unit
V
Note:
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this data sheet should also be considered.
Note 1: Full-Scale Differential Voltage Input Range(FSR) =
±300
mV (typ.)
Note 2: When either V
IN+
or V
IN-
or both are equal to or greater than V
DD1
- 2 V (e.g., if V
DD1
= 5 V, when V
IN+
and/or
V
IN-
are equal to or greater than 5 V - 2 V = 3 V), isolation amplifiers go into one of the test modes. Do not
raise either V
IN+
or V
IN-
above this voltage to keep the device in functional mode.
©2016-2017
Toshiba Electronic Devices & Storage Corporation
3
2017-10-18
Rev.7.0
TLP7820
9. Electrical Characteristics
9.1. DC Characteristics (Unless otherwise specified, T
a
= -40 to 105
,
V
DD1
= 4.5 to 5.5 V, V
DD2
= 3 to 5.5 V, V
IN+
= -200 to 200 mV, V
IN-
= 0 V)
Characteristics
Input offset voltage
Input offset voltage drift vs ambient
temperature
Symbol
V
OS
|dV
OS
/dT
a
|
Note
Test Condition
T
a
= 25
Min
-0.6
(Note 1) T
a
= 25
(Note 1) T
a
= 25
(Note 1) T
a
= 25
(Note 2) V
IN+
= -200 to 200 mV,
T
a
= 25
8.16
8.12
7.95
(Note 2) V
IN+
= -100 to 100 mV,
T
a
= 25
V
IN+
= 400 mV, T
a
= 25
V
IN+
= -400 mV, T
a
= 25
V
IN+
= 0 V, T
a
= 25
V
IN+
= 0 V
V
IN+
= 0 V
V
OUT+
or V
OUT-
-1
Typ.
0.9
2
120
8.2
8.2
8.2
0.00012
0.02
0.00007
0.015
2.497
0.0009
80
80
-0.055
8.6
6.2
21
Max
2.4
6
8.24
8.28
8.44
0.13
0.06
12
10
V/V/
%
%/
%
V
V
dB
kΩ
µA
mA
mA
Ω
Unit
mV
µV/
µV/V
V/V
Input offset voltage drift vs input side |dV
OS
/dV
DD1
|
supply voltage
Gain (Rank B)
Gain (Rank A)
Gain (None)
Gain drift vs ambient temperature
V
OUT
non-linearity (±200 mV)
V
OUT
non-linearity (±200 mV) drift vs
ambient temperature
V
OUT
non-linearity (±100 mV)
High-level output voltage
Low-level output voltage
Input common-mode rejection ratio
Equivalent input resistance
Input bias current
Input side supply current (V
DD1
)
Output side supply current (V
DD2
)
V
OUT
output resistance
G
0
G
1
G
3
|dG/dT
a
|
NL
200
|dNL
200
/dT
a
|
NL
100
V
OH
V
OL
CMRR
IN
R
IN
I
IN+
I
DD1
I
DD2
R
OUT
Note 1: See section 9.1.1. for gain rank values.
Note 2: The slope of the optimum line is derived by the method of least squares between differential input voltage
(V
IN+
- V
IN-
) and differential output voltage (V
OUT+
- V
OUT-
). Nonlinearity is defined as a fraction of the half of
the peak-to-peak value of differential output voltage deviation divided by the full-scale differential output voltage
(OVR).
9.1.1. Gain Rank (Note) (Unless otherwise specified, T
a
= 25
)
Rank
None (±3 %)
Rank A (±1 %)
Rank B (±0.5 %)
Gain Rank Marking
Blank, A, B
A, B
B
(Min)
7.95
8.12
8.16
Gain
(Typ.)
8.2
8.2
8.2
(Max)
8.44
8.28
8.24
Unit
V/V
Note:
Note:
The gain is defined as the slope of the optimum line derived by the method
of least squares between differential input voltage (V
IN+
- V
IN-
) and
differential output voltage (V
OUT+
- V
OUT-
) in the recommended voltage
range.
Specify both the part number and a rank in this format when ordering.
Example: Rank B: TLP7820(B
©2016-2017
Toshiba Electronic Devices & Storage Corporation
4
2017-10-18
Rev.7.0
TLP7820
10. AC Characteristics (Note) (Unless otherwise specified, T
a
= -40 to 105
,
V
DD1
= 4.5 to 5.5 V, V
DD2
= 3 to 5.5 V)
Characteristics
V
OUT
bandwidth (-3 dB)
V
IN
to V
OUT
propagation delay time
(10 %-10 %)
V
IN
to V
OUT
propagation delay time
(50 %-50 %)
V
IN
to V
OUT
propagation delay time
(90 %-90 %)
V
OUT
rise time
V
OUT
fall time
Common-mode transient immunity
Symbol
f
-3dB
t
pD10
t
pD50
t
pD90
t
r
t
f
CMTI
V
CM
= 1 kV, T
a
= 25
Test Condition
V
IN+
= 400 mV
p-p
, sine wave
V
IN+
= 0 to 200 mV/µs step
C
L
= 15 pF
Min
140
15
Typ.
230
1.9
2.3
2.8
1.7
1.7
20
Max
2.3
2.6
3.3
kV/µs
Unit
kHz
µs
Note:
All typical values are at T
a
= 25
.
C
L
is approximately 15 pF which includes probe and stray wiring capacitance.
11. Isolation Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
Total capacitance (input to output)
Isolation resistance
Isolation voltage
Symbol
C
S
R
S
BV
S
Note
Test Condition
Min
1
×
10
12
5000
Typ.
1.0
10
14
10000
10000
Max
Vdc
Unit
pF
Ω
Vrms
(Note 1) V
S
= 0 V, f = 1 MHz
(Note 1) V
S
= 500 V, R.H.
≤
60 %
(Note 1) AC, 60 s
AC, 1 s in oil
DC, 60 s in oil
Note 1: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
©2016-2017
Toshiba Electronic Devices & Storage Corporation
5
2017-10-18
Rev.7.0
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