LTC4041
2.5A Supercapacitor
Backup Power Manager
FEATURES
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DESCRIPTION
The
LTC
®
4041
is a complete supercapacitor backup sys-
tem for 2.9V to 5.5V supply rails. It contains a high cur-
rent step-down DC/DC converter to charge a single super-
capacitor or two supercapacitors in series. When input
power is unavailable, the step-down regulator operates
in reverse as a step-up regulator to backup the system
output from the supercapacitor(s).
The LTC4041’s adjustable input current limit function
reduces charge current to protect the input supply from
overload while an external disconnect switch isolates the
input supply during backup. When the input supply drops
below the adjustable PFI threshold, the 2.5A boost regula-
tor delivers power from the supercapacitor to the system
output.
An optional input overvoltage protection (OVP) circuit
protects the LTC4041 from high voltage damage at the V
IN
pin. An internal supercapacitor balancing circuit maintains
equal voltages across each supercapacitor and limits the
maximum voltage of each supercapacitor to a pre-deter-
mined value. The LTC4041 is available in a low profile
(0.75mm) 24-Lead 4mm × 5mm QFN package.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents, including 6522118, 6570372, 6700364, 8139329.
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2.5A Step-Down Supercapacitor Charger and 2.5A
Step-Up Backup Supply
6.5A Switches for 2.5A Backup from One
Supercapacitor or Two in Series
Input Current Limit Prioritizes Load over
Charge Current
Input Disconnect Switch Isolates Input During Backup
Automatic Seamless Switch-Over to Backup Mode
Internal Supercapacitor Balancer (No External
Resistors)
Programmable Charge Current and Charge Voltage
Input Power Fail Indicator
System Power Good Indicator
Optional OVP Circuitry Protects Device to >60V
Constant Frequency Operation
Thermally Enhanced 24-Lead 4mm × 5mm
QFN Package
APPLICATIONS
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Ride-Through “Dying Gasp” Supplies
High Current Ride-Through 3V to 5V UPS
Power Meters/Industrial Alarms
Servers/Solid State Drives
TYPICAL APPLICATION
Single Supercapacitor 3.3V Backup Application
3.3V
INPUT
SUPPLY
12m
2.2µF
V
IN
OVSNS
PFI
75k
PFO
SYSGD
CAPGD
IMON
CAPFLT
CHGEN BSTEN
PINS NOT USED
IN THIS CIRCUIT:
BAL
CAPFB
GND CAPSEL CPF PROG
1nF
1k
4041 TA01a
1.07M
CLN
IGATE
V
SYS
BSTFB
RSTFB
SW
LTC4041
SCAP
340k
2.2µH
100µF
3.3V
SYSTEM
OUTPUT
Complete Backup Event with
a Single 10F Supercapacitor
V
SYSGD
2V/DIV
0V
V
SYS
1V/DIV
V
IN
1V/DIV
V
SCAP
1V/DIV
0V
P
BACKUP
= 3.3W = 3.3V @ 1A
C
SYS
= 100µF
121k
SUPERCAP
10F
698k
3.8 seconds
348k
600ms/DIV
4041 TA01b
Rev A
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1
LTC4041
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
CAPSEL
19 PFI
18 BSTFB
25
GND
17 CPF
16 OVSNS
15 IGATE
14
PFO
8
CAPFLT
9 10 11 12
BAL
RSTFB
SYSGD
CAPFB
13 CAPGD
SCAP
V
SYS
SW
SW
V
IN
(Transient) t < 1ms, Duty Cycle < 1% ..... –0.3V to 7V
V
IN
(Steady State), SCAP, BAL, CLN,
V
SYS
, BSTFB, PFI, CPF, CAPFB,
CAPFLT,
PFO,
SYSGD, OVSNS, IMON............................–0.3V to 6V
BSTEN, CHGEN,
CAPGD, RSTFB,
CAPSEL........... –0.3V to [Max (V
IN
, V
SCAP
, V
SYS
) +0.3V]
I
OVSNS
.................................................................. ±10mA
I
CAPGD
, I
PFO
, I
SYSGD
...............................................10mA
I
PROG
....................................................................–1.1mA
Operating Junction Temperature Range
(Notes 2, 3) ............................................ –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
24 23 22 21 20
V
SYS
1
PROG 2
IMON 3
CHGEN
4
BSTEN
5
V
IN
6
CLN 7
UFD PACKAGE
24-LEAD (4mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W,
θ
JC
= 3.4°C/W
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC4041EUFD#PBF
LTC4041IUFD#PBF
TAPE AND REEL
LTC4041EUFD#TRPBF
LTC4041IUFD#TRPBF
PART MARKING
4041
4041
PACKAGE DESCRIPTION
24-Lead (4mm × 5mm × 0.75mm)
Plastic QFN
24-Lead (4mm × 5mm × 0.75mm)
Plastic QFN
TEMPERATURE RANGE
–40°C TO 125°C
–40°C TO 125°C
Consult ADI Marketing for parts specified with wider operating temperature ranges.
Tape and reel specifications.
Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
Rev A
2
For more information
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LTC4041
The
l
denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3) V
IN
= V
SYS
= 5V, V
SCAP
= 2.5V, R
PROG
= 2k, unless otherwise noted.
SYMBOL
V
IN
V
SCAP
PARAMETER
Input Voltage Range
Supercapacitor Voltage Range (Backup
Boost Input)
Quiescent Current in Charger Mode with
Charging Complete and Backup Boost
Active (CAPSEL = 1)
Quiescent Current in Charger Mode with
Charging Complete and Backup Boost in
Sleep (CAPSEL = 1)
Quiescent Current in Backup Mode with
Backup Boost in Sleep
(V
IN
= 0V, CAPSEL = 1)
V
IN
and V
SYS
Total Quiescent Current
SCAP Quiescent Current
V
IN
and V
SYS
Total Quiescent Current
SCAP Quiescent Current
V
SYS
Quiescent Current
SCAP Quiescent Current
l
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ELECTRICAL CHARACTERISTICS
CONDITIONS
l
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MIN
2.9
TYP
MAX
5.5
5.4
UNITS
V
V
µA
µA
µA
µA
µA
µA
µA
µA
V
nA
mA
mV
mV
mV
mA/mA
800
13
275
13
75
1
5.5
l
1600
26
550
26
150
2
11
1
0.812
50
1050
70
200
Quiescent Current in Shutdown
V
IN
Quiescent Current
(CHGEN =
BSTEN
= CAPSEL = 1, V
SYS
= 0V) SCAP Quiescent Current
Buck Supercapacitor Charger
V
CAPFB
I
CAPFB
I
CHG
CAPFB Pin Servo Voltage
CAPFB Pin Input Leakage Current
Regulated Supercapacitor Charge Current
V
SYS
-to-V
SCAP
Differential Undervoltage
Lockout Threshold
V
PROG
h
PROG
PROG Pin Servo Voltage
Ratio of Charge Current to PROG Pin Current
Input Current Limit Threshold Voltage
A
IMON
V
RECHRG
Input Current Limit Amplifier Gain
CLN Input Bias Current
Recharge Threshold Voltage
End-of-Charge Indication
CAPGD Rising Threshold
Hysteresis
f
OSC(BUCK)
R
P(BUCK)
R
N(BUCK)
I
LIM(BUCK)
V
BAL
I
SOURCE
I
SINK
Step-Down Converter Switching Frequency
High Side Switch On-Resistance
Low Side Switch On-Resistance
PMOS Switch Current Limit
Supercapacitor Balance Point
Balancer Source Current
Balancer Sink Current
Top/Bottom Supercapacitor Overvoltage
Threshold
Hysteresis
Top/Bottom Supercapacitor Undervoltage
Threshold
Hysteresis
(V
SCAP
– V
BAL
) and/or V
BAL
Falling, CAPSEL = 1
As a Percentage of V
SCAP
, V
SCAP
= 5V
V
SCAP
= 5V, V
BAL
= 2.4V
V
SCAP
= 5V, V
BAL
= 2.6V
(V
SCAP
– V
BAL
) and/or V
BAL
Rising, CAPSEL = 1
V
IN
– V
CLN
R
PROG
= 2k, V
SCAP
>1V
(V
SYS
– V
SCAP
) Falling
(V
SYS
– V
SCAP
) Rising
0
0.788
–50
950
30
100
0.80
0
1000
50
150
800
2500
23.5
22
25
25
32
l
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26.5
28
300
mV
mV
V/V
nA
%
mV
%
%
MHz
mΩ
mΩ
A
Ratio of V
IMON
to (V
IN
– V
CLN
)
V
CLN
= V
IN
As a Percentage of the Regulated V
SCAP
PROG Pin Average Voltage
As a Percentage of the Regulated V
SCAP
As a Percentage of the Regulated V
SCAP
V
SCAP
>1V
2.0
90
96.2
97.5
100
92.5
2.5
2.25
130
120
98.8
95
2.5
3
49
4.3
50
50
50
51
Supercapacitor Balancer
%
mA
mA
2.8
V
mV
mV
mV
Rev A
l
2.7
55
l
–50
–20
30
For more information
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3
LTC4041
The
l
denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3) V
IN
= V
SYS
= 5V, V
SCAP
= 2.5V, R
PROG
= 2k, unless otherwise noted.
SYMBOL
V
BSTFB
I
BSTFB
f
OSC(BST)
I
LIM(BST)
R
P(BST)
R
N(BST)
PARAMETER
BSTFB Pin Servo Voltage
BSTFB Pin Input Leakage Current
Step-Up Converter Switching Frequency
NMOS Switch Current Limit
High Side Switch On-Resistance
Low Side Switch On-Resistance
V
SYS
Overvoltage Shutdown Threshold
Hysteresis
Boost Undervoltage Lockout
Hysteresis
D
MAX
Maximum Boost Duty Cycle
NMOS Switch Leakage Current
PMOS Switch Leakage Current
t
MIN-BACKUP
Minimum Backup Time
SYSGD Comparator
RSTFB Threshold
Hysteresis
I
RSTFB
RSTFB Pin Input Leakage Current
SYSGD Delay
Power-Fail Comparator
PFI Input Threshold
Hysteresis
PFI Pin Leakage Current
PFI Delay to
PFO
PFO
Pin Leakage Current
PFO
Pin Output Low Voltage
Logic Input (BSTEN,
CHGEN,
CAPSEL,
CAPFLT)
V
IL
V
IH
I
IL
I
IH
Logic Low Input Voltage
Logic High Input Voltage
Logic Low Input Leakage Current
Logic High Input Leakage Current
CAPSEL Pin Leakage Current
BSTEN, CHGEN
BSTEN, CHGEN
CAPSEL = 1
l
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
l
MIN
0.78
–20
2.7
1.0
5.5
TYP
0.8
MAX
0.82
20
5
UNITS
V
nA
V
MHz
A
mΩ
mΩ
Backup Boost Switching Regulator
V
BSTFB
= 0.9V
V
SYS-BACKUP
Programmed Boost Output Voltage Range
1.125
6.5
75
70
1.25
7.5
V
SYS
Rising
Max(V
SYS
, V
SCAP
) Falling
5.3
5.5
100
2.5
150
88
5.7
V
mV
V
mV
%
BSTEN
= 1,
CHGEN
= 1
BSTEN
= 1,
CHGEN
= 1
C
CPF
= 1nF
V
RSTFB
Falling
V
RSTFB
= 0.9V
V
RSTFB
Rising & Falling
V
PFI
Falling
l
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0
0
2.2
0.72
–50
0.74
20
0
100
1.17
1.16
–100
1.19
1.19
40
0
0.5
0
65
1
1
µA
µA
ms
0.76
50
V
mV
nA
µs
1.21
1.22
100
1
200
0.4
V
V
mV
nA
µs
µA
mV
V
V
µA
µA
µA
V
PFI
= 1.3V
V
PFI
Falling
V
PFO
= 5V
I
PFO
= 5mA
1.2
0
0
1
1
10
Rev A
4
For more information
www.analog.com
LTC4041
The
l
denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 3) V
IN
= V
SYS
= 5V, V
SCAP
= 2.5V, R
PROG
= 2k, unless otherwise noted.
SYMBOL
PARAMETER
Pin Leakage Current
Pin Output Low Voltage
CAPFLT
Status Pin
CAPFLT
Pin Pull-Down Current
Pin Leakage Current
Overvoltage Protection
V
OV(CUTOFF)
V
OVGT
I
OVSNSQ
Overvoltage Protection Threshold
IGATE Output Voltage Active
OVSNS Quiescent Current
OVSNS Quiescent Current in Shutdown
IGATE Time to Reach Regulation
Overtemperature (OT) Protection
Overtemperature Shutdown
Hysteresis
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3:
The LTC4041E is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTC4041E is guaranteed to meet performance specifications
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
Temperature Rising
160
15
°C
°C
V
OVSNS
Rising, R
OVSNS
= 6.2k
V
IN
= V
OVSNS
= 5V
5V Through 6.2k Into OVSNS, I
IGATE
= 1μA
V
OVSNS
= 5V
BSTEN
= 1,
CHGEN
= 1
C
IGATE
= 2.2nF
8
6.0
6.4
9.4
8.6
40
25
3.5
6.8
12
V
V
V
µA
µA
ms
V
CAPFLT
= 200mV
5V at Pin
10
0
1
µA
µA
CONDITIONS
5V at Pin
5mA Into Pin
MIN
TYP
0
65
MAX
1
200
UNITS
µA
mV
Open-Drain Output (SYSGD, CAPGD)
ELECTRICAL CHARACTERISTICS
V
OVGT(LOAD)
IGATE Voltage Under Load
characterization and correlation with statistical process control. The
LTC4041I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The junction temperature (T
J
in °C) is calculated from
the ambient temperature (T
A
, in °C) and power dissipation (P
D
, in watts)
according to the formula:
T
J
= T
A
+ (P
D
•
θ
JA
)
where the package thermal impedance
θ
JA
= 43°C/W.
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Rev A
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5
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