NVMFS6H848N
Power MOSFET
80 V, 9.4 mW, 64 A, Single N−Channel
Features
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
NVMFS6H848NWF − Wettable Flank Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R
qJC
(Notes 1, 3)
Power Dissipation
R
qJC
(Note 1)
Continuous Drain
Current R
qJA
(Notes 1, 2, 3)
Power Dissipation
R
qJA
(Notes 1, 2)
Pulsed Drain Current
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
T
L
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
80
±20
57
40
73
37
13
9.0
3.7
1.8
308
−55 to
+ 175
61
278
260
A
°C
A
mJ
°C
W
A
W
Unit
V
V
A
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V
(BR)DSS
80 V
R
DS(ON)
MAX
9.4 mW @ 10 V
I
D
MAX
64 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
D
1
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (I
L(pk)
= 8.2 A)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
S
S
S
G
D
XXXXXX
AYWZZ
D
D
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
XXXXXX = 6H848N
XXXXXX =
(NVMFS6H848N) or
XXXXXX =
848NWF
XXXXXX =
(NVMFS6H848NWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
Symbol
R
qJC
R
qJA
Value
2.0
41
Unit
°C/W
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2017
1
August, 2018 − Rev. 1
Publication Order Number:
NVMFS6H848N/D
NVMFS6H848N
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/
T
J
I
DSS
V
GS
= 0 V,
V
DS
= 80 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
80
39
10
100
100
V
mV/°C
mA
nA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
I
GSS
V
DS
= 0 V, V
GS
= 20 V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
V
GS
= V
DS
, I
D
= 70
mA
2.0
−7.3
4.0
V
mV/°C
V
GS
= 10 V
I
D
= 10 A
8.1
52
9.4
mW
S
V
DS
=15 V, I
D
= 20 A
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
SWITCHING CHARACTERISTICS
(Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
I
S
= 10 A
T
J
= 25°C
T
J
= 125°C
0.8
0.7
39
V
GS
= 0 V, dIS/dt = 100 A/ms,
I
S
= 20 A
25
14
41
nC
ns
1.2
V
t
d(ON)
t
r
t
d(OFF)
t
f
V
GS
= 10 V, V
DS
= 64 V,
I
D
= 20 A, R
G
= 2.5
W
13
33
34
23
ns
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
V
GP
V
GS
= 10 V, V
DS
= 40 V; I
D
= 20 A
V
GS
= 10 V, V
DS
= 40 V; I
D
= 20 A
V
GS
= 0 V, f = 1 MHz, V
DS
= 40 V
1180
170
8.0
16
3.1
4.8
2.8
4.5
V
nC
pF
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
t
RR
t
a
t
b
Q
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width
v
300
ms,
duty cycle
v
2%.
5. Switching characteristics are independent of operating junction temperatures.
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NVMFS6H848N
TYPICAL CHARACTERISTICS
250
250
V
GS
= 10 V
I
D
, DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
200
200
T
J
= 25°C
150
6V
150
100
5V
4V
0
1
2
3
4
5
6
7
8
100
50
0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
50
0
0
1
T
J
= 125°C
2
3
4
T
J
= −55°C
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
16
T
J
= 25°C
I
D
= 10 A
14
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
16
Figure 2. Transfer Characteristics
T
J
= 25°C
14
12
12
10
10
V
GS
= 10 V
8
6
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
8
6
5
6
7
8
9
10
I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.5
R
DS(on)
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
V
GS
= 10 V
I
D
= 10 A
I
DSS
, LEAKAGE (nA)
2.0
100K
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 175°C
T
J
= 150°C
T
J
= 125°C
10K
1K
1.5
T
J
= 85°C
100
T
J
= 25°C
10
1
1.0
0.5
−50 −25
0
25
50
75
100
125
150
175
5
15
25
35
45
55
65
75
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS6H848N
TYPICAL CHARACTERISTICS
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
10,000
C
ISS
1000
C
OSS
10
9
8
7
6
5
4
3
2
1
0
0
2
4
6
8
10
12
14
16
18
Q
G
, TOTAL GATE CHARGE (nC)
V
DS
= 40 V
T
J
= 25°C
I
D
= 20 A
Q
GS
Q
GD
C, CAPACITANCE (pF)
100
10
V
GS
= 0 V
T
J
= 25°C
f = 1 MHz
0
10
20
30
40
50
60
C
RSS
1
70
80
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
I
S
, SOURCE CURRENT (A)
10
Figure 8. Gate−to−Source Voltage vs. Total
Charge
V
GS
= 0 V
t, TIME (ns)
100
t
d(off)
t
f
t
r
t
d(on)
1
10
V
GS
= 10 V
V
DS
= 64 V
I
D
= 20 A
1
1
10
R
G
, GATE RESISTANCE (W)
100
0.1
0.3
0.4
T
J
= 125°C T
J
= 25°C T
J
= −55°C
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
T
C
= 25°C
Single Pulse
V
GS
≤
10 V
10
ms
10
0.5 ms
1 ms
10 ms
100
Figure 10. Diode Forward Voltage vs. Current
I
D
, DRAIN CURRENT(A)
100
10
I
PEAK
(A)
T
J(initial)
= 25°C
T
J(initial)
= 100°C
1
1
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1
10
0.1
100
1000
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
0.1
1E−05
1E−04
1E−03
1E−02
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
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NVMFS6H848N
TYPICAL CHARACTERISTICS
100
Duty Cycle = 0.5
10
R(t) (°C/W)
0.2
0.1
0.05
1 0.02
0.01
0.1
Single Pulse
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
0.01
PULSE TIME (sec)
Figure 13. Thermal Characteristics
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