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25LC1024T-E/SN

产品描述电可擦除可编程只读存储器 1024k128KX8 2.5V SER EE EXT, SOIC
产品类别半导体    存储器 IC    电可擦除可编程只读存储器   
文件大小570KB,共34页
制造商Microchip(微芯科技)
官网地址https://www.microchip.com
标准
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25LC1024T-E/SN概述

电可擦除可编程只读存储器 1024k128KX8 2.5V SER EE EXT, SOIC

25LC1024T-E/SN规格参数

参数名称属性值
厂商名称Microchip(微芯科技)
产品种类电可擦除可编程只读存储器
安装风格SMD/SMT
封装 / 箱体SOIC-8
存储容量1 Mbit
组织128 k x 8
接口类型Serial, 4-Wire, SDI, SPI
数据保留200 Year
最大时钟频率20 MHz
电源电压-最小2.5 V
电源电压-最大5.5 V
最小工作温度- 40 C
最大工作温度+ 125 C
封装Reel
工作电源电压2.5 V to 5.5 V
工厂包装数量3300
单位重量540 mg

文档预览

下载PDF文档
25LC1024
1 Mbit SPI Bus Serial EEPROM
Device Selection Table
Part Number
25LC1024
V
CC
Range
2.5-5.5V
Page Size
256 Byte
Temp. Ranges
I,E
Packages
P, SM, MF
Features:
• 20 MHz max. Clock Speed
• Byte and Page-level Write Operations:
- 256 byte page
- 6 ms max. write cycle time
- No page or sector erase required
• Low-Power CMOS Technology:
- Max. Write current: 5 mA at 5.5V, 20 MHz
- Read current: 7 mA at 5.5V, 20 MHz
- Standby current: 1A at 2.5V
(Deep power-down)
• Electronic Signature for Device ID
• Self-Timed Erase and Write Cycles:
- Page Erase (6 ms max.)
- Sector Erase (10 ms max.)
- Chip Erase (10 ms max.)
• Sector Write Protection (32K byte/sector):
- Protect none, 1/4, 1/2 or all of array
• Built-In Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High Reliability:
- Endurance: 1M erase/write cycles
- Data Retention: >200 years
- ESD Protection: >4000V
• Temperature Ranges Supported:
- Industrial (I):
-40C to +85C
- Automotive (E):
-40°C to +125°C
• Pb-Free and RoHS Compliant
Description:
The Microchip Technology Inc. 25LC1024 is a 1024
Kbit serial EEPROM memory with byte-level and page-
level serial EEPROM functions. It also features Page,
Sector and Chip erase functions typically associated
with Flash-based products. These functions are not
required for byte or page write operations. The memory
is accessed via a simple Serial Peripheral Interface
(SPI) compatible serial bus. The bus signals required
are a clock input (SCK) plus separate data in (SI) and
data out (SO) lines. Access to the device is controlled
by a Chip Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25LC1024 is available in standard packages
including 8-lead PDIP and SOIJ, and advanced 8-lead
DFN package. All devices are Pb-free.
Package Types (not to scale)
DFN
25LC1024
CS 1
SO 2
WP 3
V
SS
4
(MF)
8
7
6
5
V
CC
HOLD
SCK
SI
PDIP/SOIJ
(P, SM)
25LC1024
CS
SO
WP
V
SS
1
2
3
4
8
7
6
5
V
CC
HOLD
SCK
SI
2010 Microchip Technology Inc.
DS22064D-page 1

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