Module Name:
MTD0075AROG
Ver1.0
1. Scope
This data sheet is to introduce the specification of
MTD0075AROG,active
matrix OLED module. It
is composed of an OLED panel, driver ICs and FPC. The 0.75′′ display area contains
128 x 128
dots.
2. Application
Digital equipments which need display, instrumentation, remote control, electronic product.
.
3. General Information
Item
Size
Dot Matrix
Display Color
Interface
Outline Dimension
Active Area
Driver IC
Weight
Operating Temperature
Storage Temperature
0.75
128×128
Contents
inch
dot
Unit
White / 16 gray scale
SPI , I
2
C
23.15x 40.93 x 1.21
19.18x19.18
SSD1327Z
TBD
-40℃~+70℃
-40℃~+85℃
g
mm
mm
MICROTIPS TECHNOLOGY USA
3504 Lake Lynda Dr, Suite 110, Orlando, Florida, 32817, TEL: 407-273-0204,
FAX: 407-273-0771
Page 3 of 19
Module Name:
MTD0075AROG
Ver1.0
5. Interface signals
PIN NO.
1
2
PIN NAME
VSS
VCC
DESCRIPTION
Ground pin.
Power supply for panel driving voltage.
3
4
5
VDD
BS1
VSS
Power supply pin for core logic operation. VDD can be supplied externally (within the
range of 2.4V to 2.6V) or regulated internally from VCI. A capacitor should be connected
between VDD and VSS under all circumstances.
MCU bus interface selection pins. I
2
C(BS1=1);SPI(BS1=0).
Ground pin.
This pin is the segment output current reference pin. A resistor should be connected
between this pin and VSS.
6
7
8
9
IREF
CS#
RES#
D/C#
This pin is the chip select input connecting to the MCU. The chip is enabled for MCU
communication only when CS# is pulled LOW (active LOW).
This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is
executed.
This pin is Data/Command control pin connecting to the MCU.
10
11
12
D0
D1
D2
When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be
the serial data input: SDIN and D2 should be kept NC. When I2C mode is selected, D2,
D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial
clock input, SCL.
Low voltage power supply and power supply for interface logic level. It should match
with the MCU interface voltage level and must
be connected to external source.
(Regulated internally from VCI when VCI is >2.6V)
COM signal deselected voltage level. A capacitor should be connected between this pin
and VSS.
Power supply for panel driving voltage.
13
VCI
14
15
VCOMH
VCC
6. Environment Conditions
6.1 Electrical Absolute max. ratings
Parameter
Supply Voltage
Supply Voltage
Ta=25℃
MIN
8
-0.3
MAX
19
4.0
Unit
V
V
Remark
Symbol
VCC
VCI
6.2 Environment Conditions
Item
Operating Temperature
Storage Temperature
Symbol
TOPR
TSTG
MIN
-40
-40
MAX
70
85
Unit
℃
℃
Remark
MICROTIPS TECHNOLOGY USA
3504 Lake Lynda Dr, Suite 110, Orlando, Florida, 32817, TEL: 407-273-0204,
FAX: 407-273-0771
Page 5 of 19
FPGA/CPLD
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