MCP3550/1/3
Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs
Features
• 22-bit ADC in Small 8-pin MSOP Package with
Automatic Internal Offset and Gain Calibration
• Low-Output Noise of 2.5 µV
RMS
with Effective
Resolution of 21.9 bits (MCP3550/1)
• 3 µV Typical Offset Error
• 2 ppm Typical Full-Scale Error
• 6 ppm Maximum INL Error
• Total Unadjusted Error Less Than 10 ppm
• No Digital Filter Settling Time, Single-Command
Conversions through 3-wire SPI Interface
• Ultra-Low Conversion Current (MCP3550/1):
- 100 µA typical (V
DD
= 2.7V)
- 120 µA typical (V
DD
= 5.0V)
• Differential Input with V
SS
to V
DD
Common Mode
Range
• 2.7V to 5.5V Single-Supply Operation
• Extended Temperature Range:
- -40°C to +125°C
Description
The Microchip Technology Inc. MCP3550/1/3 devices
are 2.7V to 5.5V low-power, 22-bit Delta-Sigma Ana-
log-to-Digital Converters
(ADCs).
The devices offer
output noise as low as 2.5 µV
RMS
, with a total
unadjusted error of 10 ppm. The family exhibits 6 ppm
Integral Non-Linearity (INL) error, 3 µV offset error and
less than 2 ppm full-scale error. The MCP3550/1/3
devices provide high accuracy and low noise
performance
for
applications
where
sensor
measurements (such as pressure, temperature and
humidity) are performed. With the internal oscillator
and high oversampling rate, minimal external
components
are
required
for
high-accuracy
applications.
This product line has fully differential analog inputs,
making it compatible with a wide variety of sensor,
industrial control or process control applications.
The MCP3550/1/3 devices operate from -40°C to
+125°C and are available in the space-saving 8-pin
MSOP and SOIC packages.
Applications
•
•
•
•
•
•
Weigh Scales
Direct Temperature Measurement
6-digit DVMs
Instrumentation
Data Acquisition
Strain Gauge Measurement
Package Types:
MCP3550/1/3
SOIC, MSOP
V
REF
1
V
IN
+ 2
V
IN
– 3
V
SS
4
V
SS
V
DD
8 V
DD
7 CS
6 SDO/RDY
5 SCK
Block Diagram
V
REF
Device Selection Table
SINC
4
V
IN
+
V
IN
-
Serial Interface
3rd-Order
DS ADC
Modulator
w/ Internal
Calibration
Part Number
SCK
SDO
RDY
CS
MCP3550-50
MCP3550-60
MCP3551
MCP3553
Sample
Rate
12.5 sps
15 sps
13.75 sps
60 sps
Effective
Resolution
21.9 bits
21.9 bits
21.9 bits
20.6 bits
50/60 Hz
Rejection
50 Hz
60 Hz
50/60 Hz
(simultaneous)
N/A
Internal
Oscillator
V
DD
POR
©
2007 Microchip Technology Inc.
DS21950D-page 1
MCP3550/1/3
1.0
1.1
ELECTRICAL
CHARACTERISTICS
Maximum Ratings*
V
DD
...................................................................................7.0V
All inputs and outputs w.r.t V
SS
.............. -0.3V to V
DD
+ 0.3V
Difference Input Voltage ....................................... |V
DD
- V
SS
|
Output Short Circuit Current ................................. Continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±10 mA
Storage Temperature.....................................-65°C to +150°C
Ambient temp. with power applied ................-55°C to +125°C
ESD protection on all pins (HBM, MM)
............ ≥
6 kV,
≥
400V
Maximum Junction Temperature (T
J
) . .........................+150°C
† Notice:
Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
DC CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated, all parameters apply at -40°C
≤
T
A
≤
+85°C, V
DD
= 2.7V or 5.0V.
V
REF
= 2.5V. V
IN
+ = V
IN
- = V
CM
= V
REF
/2. All ppm units use 2*V
REF
as full-scale range. Unless otherwise noted, specification
applies to entire MCP3550/1/3 family.
Parameters
Noise Performance (MCP3550/1)
No Missing Codes
Output Noise
Effective Resolution
Noise Performance (MCP3553)
No Missing Codes
Output Noise
Effective Resolution
Conversion Times
MCP3550-50
MCP3550-60
MCP3551
MCP3553
Accuracy
Integral Non-Linearity
Offset Error
INL
V
OS
—
-12
—
—
Positive Full-Scale Error
Negative Full-Scale Error
Offset Drift
Positive/Negative Full-Scale Error
Drift
Note 1:
2:
3:
4:
5:
6:
V
FS,P
V
FS,N
-10
-10
—
—
±2
±3
±4
±6
±2
±2
0.040
0.028
6
+12
—
—
+10
+10
—
—
ppm
µV
µV
µV
ppm
ppm
ppm/°C
ppm/°C
T
A
= +25°C only (Note
2)
T
A
= +25°C
T
A
= +85°C
T
A
= +125°C
T
A
= +25°C only
T
A
= +25°C only
t
CONV
t
CONV
t
CONV
t
CONV
-1.0%
-1.0%
-1.0%
-1.0%
80
66.67
72.73
16.67
+1.0%
+1.0%
+1.0%
+1.0%
ms
ms
ms
ms
NMC
e
N
ER
20
—
—
—
6
20.6
—
—
—
bits
µV
RMS
bits RMS
V
REF
= 5V
At DC (Note
5)
NMC
e
N
ER
22
—
—
—
2.5
21.9
—
—
—
bits
µV
RMS
bits RMS
V
REF
= 5V
At DC (Note
5)
Sym
Min
Typ
Max
Units
Conditions
This parameter is established by characterization and not 100% tested.
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
This current is due to the leakage current and the current due to the offset voltage between V
IN
+ and V
IN
-.
Input impedance is inversely proportional to clock frequency; typical values are for the MCP3550/1 device. V
REF
= 5V.
Characterized by design, but not tested.
Rejection performance depends on internal oscillator accuracy; see
Section 4.0 “Device Overview”
for more informa-
tion on oscillator and digital filter design. MCP3550/1 device rejection specifications characterized from 49 to 61 Hz.
DS21950D-page 2
©
2007 Microchip Technology Inc.
MCP3550/1/3
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications:
Unless otherwise indicated, all parameters apply at -40°C
≤
T
A
≤
+85°C, V
DD
= 2.7V or 5.0V.
V
REF
= 2.5V. V
IN
+ = V
IN
- = V
CM
= V
REF
/2. All ppm units use 2*V
REF
as full-scale range. Unless otherwise noted, specification
applies to entire MCP3550/1/3 family.
Parameters
Rejection Performance
(1,6)
Common Mode DC Rejection
Power Supply DC Rejection
Common Mode 50/60 Hz Rejection
Power Supply 50/60 Hz Rejection
Power Supply 50/60 Hz Rejection
CMRR
PSRR
PSRR
—
—
—
—
—
-135
-115
-135
-85
-120
—
—
—
—
—
dB
dB
dB
dB
dB
V
CM
varies from 0V to V
DD
MCP3551
only, V
DD
varies from
4.5V to 5.5V
MCP3550-50
or
MCP3550-60
only
at 50 or 60 Hz respectively, V
DD
varies from 4.5V to 5.5V
MCP3551
only,
0 < V
CM
< V
DD
,
-V
REF
< V
IN
= (V
IN
+ -V
IN
-) < +V
REF
MCP3550-50
or
MCP3550-60
only
at 50 or 60 Hz respectively,
0 < V
CM
< V
DD
,
-V
REF
< V
IN
= (V
IN
+ -V
IN
-) < +V
REF
V
CM
range from 0 to V
DD
Sym
Min
Typ
Max
Units
Conditions
Normal Mode 50 and 60 Hz
Rejection
Normal Mode 50 or 60 Hz
Rejection
NMRR
—
-85
—
dB
NMRR
—
-120
—
dB
Analog Inputs
Differential Input Range
Absolute/Common Mode Voltages
Analog Input Sampling Capacitor
Differential Input Impedance
Shutdown Mode Leakage Current
Reference Input
Voltage Range
Reference Input Sampling
Capacitor
Reference Input Impedance
Shutdown Mode Reference
Leakage Current
Power Requirements
Power Supply Voltage Range
MCP3550-50, MCP3551
Supply
Current
MCP3550-60, MCP3553
Supply
Current
Supply Current, Sleep Mode
Supply Current, Shutdown Mode
Serial Interface
Voltage Input High (CS, SCK)
Voltage Input Low (CS, SCK)
Voltage Output High (SDO/RDY)
Note 1:
2:
3:
4:
5:
6:
V
IH
V
IL
V
OH
0.7 V
DD
—
V
DD
- 0.5
—
—
—
—
0.4
—
V
V
V
V
OH
= 1 mA, V
DD
= 5.0V
V
DD
I
DD
I
DD
I
DDSL
I
DDS
2.7
—
—
—
—
—
—
—
120
100
140
120
10
—
1
5.5
170
—
185
—
V
µA
µA
µA
µA
µA
µA
CS = SCK = V
DD
V
DD
= 5V
V
DD
= 2.7V
V
DD
= 5V
V
DD
= 2.7V
0.1
—
—
—
—
15
2.4
1
V
DD
—
—
—
V
pF
MΩ
nA
Note 5
Note 4
V
IN
+ = V
IN
- = V
SS
; CS = V
DD
V
IN+
−
V
IN-
-V
REF
V
SS
- 0.3
—
—
—
—
—
10
2.4
1
+V
REF
V
DD
+ 0.3
—
—
—
V
V
pF
MΩ
nA
V
IN
+ = V
IN
- = V
DD
; CS = V
DD
(Note 3)
Note 5
This parameter is established by characterization and not 100% tested.
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
This current is due to the leakage current and the current due to the offset voltage between V
IN
+ and V
IN
-.
Input impedance is inversely proportional to clock frequency; typical values are for the MCP3550/1 device. V
REF
= 5V.
Characterized by design, but not tested.
Rejection performance depends on internal oscillator accuracy; see
Section 4.0 “Device Overview”
for more informa-
tion on oscillator and digital filter design. MCP3550/1 device rejection specifications characterized from 49 to 61 Hz.
©
2007 Microchip Technology Inc.
DS21950D-page 3
MCP3550/1/3
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications:
Unless otherwise indicated, all parameters apply at -40°C
≤
T
A
≤
+85°C, V
DD
= 2.7V or 5.0V.
V
REF
= 2.5V. V
IN
+ = V
IN
- = V
CM
= V
REF
/2. All ppm units use 2*V
REF
as full-scale range. Unless otherwise noted, specification
applies to entire MCP3550/1/3 family.
Parameters
Voltage Output Low (SDO/RDY)
Input leakage Current
(CS, SCK)
Internal Pin Capacitance
(CS, SCK, SDO/RDY)
Note 1:
2:
3:
4:
5:
6:
Sym
V
OL
I
LI
C
INT
Min
—
-1
—
Typ
—
—
5
Max
0.4
1
—
Units
V
µA
pF
Note 1
Conditions
V
OH
= -1 mA, V
DD
= 5.0V
This parameter is established by characterization and not 100% tested.
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
This current is due to the leakage current and the current due to the offset voltage between V
IN
+ and V
IN
-.
Input impedance is inversely proportional to clock frequency; typical values are for the MCP3550/1 device. V
REF
= 5V.
Characterized by design, but not tested.
Rejection performance depends on internal oscillator accuracy; see
Section 4.0 “Device Overview”
for more informa-
tion on oscillator and digital filter design. MCP3550/1 device rejection specifications characterized from 49 to 61 Hz.
TEMPERATURE CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated
Parameters
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Thermal Package Resistances
Thermal Resistance, 8L-MSOP
Thermal Resistance, 8L-SOIC
θ
JA
θ
JA
—
—
206
163
—
—
°C/W
°C/W
T
A
T
A
-40
-40
—
—
+85
+125
°C
°C
Sym
Min
Typ
Max
Units
Conditions
SERIAL TIMINGS
Electrical Specifications:
Unless otherwise indicated, all parameters apply at -40°C
≤
T
A
≤
+85°C,
V
DD
= 3.3V or 5.0V, SDO load = 50 pF.
Parameters
CLK Frequency
CLK High
CLK Low
CLK fall to output data valid
CS low to indicate RDY state
CS minimum low time
RDY flag setup time
CS rise to output disable
CS disable time
Power-up to CS LOW
CS High to Shutdown Mode
Sym
f
SCK
t
HI
t
LO
t
DO
t
RDY
t
CSL
t
SU
t
DIS
t
CSD
t
PUCSL
t
CSHSD
Min
—
90
90
0
0
50
20
20
90
—
—
Typ
—
—
—
—
—
—
—
—
—
10
10
Max
5
—
—
90
50
—
—
—
—
—
—
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
Conditions
DS21950D-page 4
©
2007 Microchip Technology Inc.
MCP3550/1/3
t
RDY
t
CSD
CS
t
CSL
t
DIS
t
CSHSD
SDO
/RDY
t
DO
t
HI
SCK
t
SU
f
SCK
t
LO
FIGURE 1-1:
Serial Timing.
V
DD
CS
t
PUCSL
FIGURE 1-2:
Power-up Timing.
©
2007 Microchip Technology Inc.
DS21950D-page 5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
