SA639
Low voltage mixer FM IF system with filter amplifier and
data switch
Rev. 4 — 10 July 2014
Product data sheet
1. General description
The SA639 is a low-voltage high performance monolithic FM IF system with high-speed
RSSI incorporating a mixer/oscillator, two wideband limiting intermediate frequency
amplifiers, quadrature detector, logarithmic Received Signal Strength Indicator (RSSI),
fast RSSI op amps, voltage regulator, wideband data output, post detection filter amplifier
and data switch. The SA639 is available in 24-lead TSSOP (Thin Shrink Small Outline
Package).
The SA639 was designed for high-bandwidth portable communication applications and
functions down to 2.7 V. The RF section is similar to the famous NE605. The data output
provides a minimum bandwidth of 1 MHz to demodulate wideband data. The RSSI output
is amplified and has access to the feedback pin. This enables the designer to level adjust
the outputs or add filtering.
The post-detection amplifier may be used to realize a low-pass filter function. A
programmable data switch routes a portion of the data signal to an external integration
circuit that generates a data comparator reference voltage.
SA639 incorporates a Power-down mode which powers down the device when pin 8
(POWER_DOWN_CTRL) is HIGH. Power down logic levels are CMOS and TTL
compatible with high input impedance.
2. Features and benefits
V
CC
= 2.7 V to 5.5 V
Low power consumption: 8.6 mA (typical) at 3 V
Wideband data output (1 MHz minimum)
Fast RSSI rise and fall times
Mixer input to >500 MHz
Mixer conversion power gain of 9.2 dB and noise figure of 11 dB at 110 MHz
XTAL oscillator effective to 150 MHz (L.C. oscillator to 1 GHz local oscillator can be
injected)
92 dB of IF amplifier/limiter power gain
25 MHz limiter small signal bandwidth
Temperature compensated logarithmic Received Signal Strength Indicator (RSSI) with
a dynamic range in excess of 80 dB
RSSI output internal op amp
Post detection amplifier for filtering
Programmable data switch
NXP Semiconductors
SA639
Low voltage mixer FM IF system with filter amplifier and data switch
Excellent sensitivity: 2.24
V
into 50
matching network for 10 dB S/N
(Signal-to-Noise ratio) with RF at 110 MHz and IF at 9.8 MHz
ESD hardened
Power-down mode
3. Applications
DECT (Digital European Cordless Telephone)
FSK and ASK data receivers
4. Ordering information
Table 1.
Ordering information
Topside
mark
SA639DH
Package
Name
TSSOP24
Description
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
Version
SOT355-1
Type number
SA639DH/01
4.1 Ordering options
Table 2.
Ordering options
Orderable
part number
SA639DH/01,112
SA639DH/01,118
Package
Packing method
Minimum
order
quantity
1575
2500
Temperature
Type number
SA639DH/01
TSSOP24
TSSOP24
Standard marking
*IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*Standard mark SMD
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
SA639
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 4 — 10 July 2014
2 of 29
NXP Semiconductors
SA639
Low voltage mixer FM IF system with filter amplifier and data switch
7. Functional description
7.1 Circuit description
The SA639 is an IF signal processing system suitable for second IF or single conversion
systems with input frequency as high as 1 GHz. The bandwidth of the IF amplifier is about
40 MHz, with 44 dB of gain from a 50
source. The bandwidth of the limiter is about
28 MHz with about 58 dB of gain from a 50
source. However, the gain/bandwidth
distribution is optimized for 9.8 MHz, 330
source applications. The overall system is
well-suited to battery operation as well as high performance and high-quality products of
all types, such as digital cordless phones.
The input stage is a Gilbert cell mixer with oscillator. Typical mixer characteristics include
a noise figure of 11 dB, conversion power gain of 9.2 dB, and input third-order intercept of
9.5
dBm. The oscillator operates in excess of 1 GHz in L/C tank configurations. Hartley
or Colpitts circuits can be used up to 100 MHz for crystal configurations. Butler oscillators
are recommended for crystal configurations up to 150 MHz.
The output of the mixer is internally loaded with a 330
resistor permitting direct
connection to a 330
ceramic filter. The input resistance of the limiting IF amplifiers is
also 330
.
With most 330
ceramic filters and many crystal filters, no impedance
matching network is necessary. To achieve optimum linearity of the log signal strength
indicator, there must be a 6 dBV insertion loss between the first and second IF stages. If
the IF filter or interstage network does not cause 6 dBV insertion loss, a fixed or variable
resistor can be added between the first IF output (IF_AMP_OUT, pin 20) and the
interstage network.
The signal from the second limiting amplifier goes to a Gilbert cell quadrature detector.
One port of the Gilbert cell is internally driven by the IF. The other output of the IF is
AC-coupled to a tuned quadrature network. This signal, which now has a 90 phase
relationship to the internal signal, drives the other port of the multiplier cell.
Overall, the IF section has a gain of 90 dB for operation at intermediate frequency at
9.8 MHz. Special care must be given to layout, termination, and interstage loss to avoid
instability.
The demodulated output (DATA_OUT) of the quadrature is a low-impedance voltage
output. This output is designed to handle a minimum bandwidth of 1 MHz. This is
designed to demodulate wideband data, such as in DECT applications.
7.1.1 Post detection filter amplifier
The filter amplifier may be used to realize a group delay optimized low-pass filter for post
detection. The filter amplifier can be configured for Sallen and Key low-pass with Bessel
characteristic and a 3 dB cut frequency of about 800 kHz.
The filter amplifier provides a gain of 0 dB. To reduce frequency response changes as a
result of amplifier load variations, the output impedance is less than 500
.
To keep the
amplifier frequency response influence on the filter group delay characteristic at a
minimum, the filter amplifier has a 3 dB bandwidth of at least 4 MHz. At the center of the
carrier, it is mandatory to provide a filter output DC bias voltage of 1.6 V to be within the
SA639
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 4 — 10 July 2014
5 of 29
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