M
Features
•
•
•
•
•
•
•
•
Low Quiescent Current: 600 nA/Amplifier (typ.)
Stable for gains of 10 V/V or higher
Rail-to-Rail Input: -0.3V (min.) to V
DD
+ 0.3V (max.)
Rail-to-Rail Output:
- V
SS
+10 mV (min.) to V
DD
-10 mV (max.)
Gain Bandwidth Product: 100 kHz (typ.)
Wide Supply Voltage Range: 1.4V to 5.5V (max.)
Available in Single, Dual and Quad
Chip Select (CS) with MCP6143
MCP6141/2/3/4
Description
The MCP6141/2/3/4 family of non-unity gain stable
operational amplifiers (op amps) from Microchip
Technology, Inc. operate with a single supply voltage
as low as 1.4V, while drawing less than 1 µA (max.) of
quiescent current per amplifier. These devices are also
designed to support rail-to-rail input and output swing.
The MCP6141/2/3/4 op amps have a gain bandwidth
product of 100 kHz (typ.) and are stable for gains of
10 V/V or higher. This specification makes these
devices appropriate for battery-powered applications
where higher frequency responses from the amplifier
are required.
The MCP6141/2/3/4 family of op amps are offered in
single (MCP6141), single with a Chip Select (CS) fea-
ture (MCP6143), dual (MCP6142) and quad
(MCP6144) configurations.
600 nA, Non-Unity Gain Rail-to-Rail Input/Output Op Amps
Applications
•
•
•
•
Toll Booth Tags
Wearable Products
Temperature Measurement
Battery-Powered
Available Tools
• Spice macro models (at www.microchip.com)
• FilterLab
®
Software (at www.microchip.com)
Typical Applications
V
DD
V
DD
Package Types
MCP6141
PDIP, SOIC, MSOP
NC 1
-IN 2
+IN 3
V
SS
4
-
+
8 NC
7 V
DD
6 OUT
5 NC
MCP6142
PDIP, SOIC, MSOP
OUTA 1
-INA 2
+INA 3
V
SS
4
- A+
+B -
8 V
DD
7 OUTB
6 -INB
5 +INB
1k
Ω
+1.4V
to
5.5V
I
DD
R
I
100 kΩ
MCP614X
V
SS
R
F
= 1 MΩ
High Side Battery Current Sensor
R
F
G
n
=
1
+ ------
≥
10V/V
R
I
V
1
V
2
V
3
R
1
R
2
R
3
I
1
I
2
I
3
R
F
I
F
V
OUT
MCP6143
PDIP, SOIC, MSOP
NC 1
-IN 2
+IN 3
V
SS
4
-
+
8 CS
7 V
DD
6 OUT
5 NC
MCP6144
PDIP, SOIC, TSSOP
OUTA 1
14 OUTD
A D
-INA1 2 - + + - 13 -IND
+INA1 3
12 +IND
V
DD
4
+INB 5
-INB 6 - B+ + -
C
OUTB1 7
11 V
SS
10 +INC
9 -INC
8 OUTC
V
REF
MCP614X
Summing Amplifier
1
1
1
G
n
=
1
+
R
F
----- + ----- + -----
≥
10V/V
-
-
-
R
1
R
2
R
3
2002 Microchip Technology Inc.
21668A-page 1
MCP6141/2/3/4
1.0
1.1
ELECTRICAL
CHARACTERISTICS
Maximum Ratings†
PIN FUNCTION TABLE
Name
+IN/+INA/+INB/+INC/+IND
-IN/-INA/-INB/-INC/-IND
V
DD
V
SS
CS
NC
Function
Non-inverting Inputs
Inverting Inputs
Positive Power Supply
Negative Power Supply
Chip Select
No internal connection
V
DD
- V
SS
.........................................................................7.0V
All inputs and outputs........................ V
SS
-0.3V to V
DD
+0.3V
Difference Input voltage ....................................... |V
DD
- V
SS
|
Output Short Circuit Current ..................................continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage temperature .....................................-65°C to +150°C
Junction Temperature, T
J
............................................ +150°C
ESD protection on all pins (HBM:MM)..................
≥
4 kV:200 V
†Notice:
Stresses above those listed under “Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
OUT/OUTA/OUTB/OUTC/OUTD Outputs
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, all limits are specified for V
DD
= +1.4V to +5.5V, V
SS
= GND, T
A
= 25°C,
V
CM
= V
DD
/2, R
L
= 1 MΩ to V
DD
/2, and V
OUT
~ V
DD
/2.
Parameters
Sym
V
OS
∆V
OS
/∆T
PSRR
I
B
I
B
I
OS
Z
CM
Z
DIFF
VCMR
CMRR
Min
-3.0
—
70
—
—
—
—
—
V
SS
−
0.3
62
60
60
Typ
—
±1.5
85
1.0
—
1.0
10
13
||6
10 ||6
—
80
75
80
13
Max
+3.0
—
—
—
100
—
—
—
V
DD
+ 0.3
—
—
—
Units
mV
µV/°C
dB
pA
pA
pA
Ω||pF
Ω||pF
V
dB
dB
dB
Conditions
V
CM
= V
SS
T
A
= -40°C to +85°C
Input Offset
Input Offset Voltage
Drift with Temperature
Power Supply Rejection
Input Bias Current and Impedance
Input Bias Current
Input Bias Current Over-Temperature
Input Offset Current
Common Mode Input Impedance
Differential Input Impedance
T
A
= -40°C to +85°C
Common Mode
Common-Mode Input Range
Common-Mode Rejection Ratio
V
DD
= 5V,
V
CM
= -0.3V to 5.3V
V
DD
= 5V,
V
CM
= 2.5V to 5.3V
V
DD
= 5V,
V
CM
= -0.3V to 2.5V
R
L
= 50 kΩ to V
DD
/2,
100 mV < V
OUT
<
(V
DD
−
100 mV)
R
L
= 50 kΩ to V
DD
/2
V
OUT
= 2.5V, V
DD
= 5 V
Open Loop Gain
DC Open Loop Gain (large signal)
A
OL
95
115
—
dB
Output
Maximum Output Voltage Swing
Output Short Circuit Current
V
OL
, V
OH
V
SS
+ 10
I
O
V
DD
I
Q
—
1.4
0.3
—
21
—
0.6
V
DD
−
10
—
5.5
1.0
mV
mA
V
µA
I
O
= 0
Power Supply
Supply Voltage
Quiescent Current per amplifier
21668A-page 2
2002
Microchip Technology Inc.
MCP6141/2/3/4
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, all limits are specified for V
DD
= +5V, V
SS
= GND, T
A
= 25 °C,
V
CM
= V
DD
/2, R
L
= 1 MΩ to V
DD
/2, C
L
= 60 pF, and V
OUT
~ V
DD
/2.
Parameters
Gain Bandwidth Product
Slew Rate
Phase Margin
Input Voltage Noise
Input Voltage Noise Density
Input Current Noise Density
Sym
GBWP
SR
PM
E
n
e
n
i
n
Min
—
—
—
—
—
—
Typ
100
24
60
5.0
170
0.6
Max
—
—
—
—
—
—
Units
kHz
V/ms
°
µVp-p
nV/√Hz
fA/√Hz
G = +10
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
Conditions
SPECIFICATIONS FOR MCP6143 CHIP SELECT FEATURE
Electrical Characteristics:
Unless otherwise indicated, all limits are specified for V
DD
= +1.4V to +5.5V, V
SS
= GND, T
A
= 25 °C,
V
CM
= V
DD
/2, R
L
= 1 MΩ to V
DD
/2, C
L
= 60 pF, and V
OUT
~ V
DD
/2.
Parameters
Sym
Min
Typ
Max
Units
Conditions
CS Low Specifications
CS Logic Threshold, Low
CS Input Current, Low
V
IL
I
CSL
V
SS
—
—
5.0
V
SS
+ 0.3
—
V
pA
For entire V
DD
range
CS = V
SS
CS High Specifications
CS Logic Threshold, High
CS Input Current, High
CS Input High, GND Current
Amplifier Output Leakage, CS High
V
IH
I
CSH
I
Q
V
DD
- 0.3
—
—
—
—
5.0
20
20
V
DD
—
—
—
V
pA
pA
pA
For entire V
DD
range
CS = V
DD
CS = V
DD
CS = V
DD
Dynamic Specifications
CS Low to Amplifier Output High
Turn-on Time
CS High to Amplifier Output High Z
Hysteresis
t
ON
t
OFF
V
HYST
—
—
—
2.0
10
0.6
50
—
—
ms
µs
V
CS low = V
SS
+ 0.3V, G = +1 V/V,
V
OUT
= 0.9 V
DD
/2
CS high = V
DD
- 0.3V, G = +1 V/V
V
OUT
= 0.1 V
DD
/2
V
DD
= 5V
TEMPERATURE SPECIFICATIONS
Electrical Characteristics:
Unless otherwise indicated, all limits are specified for V
DD
= +1.4V to +5.5V, V
SS
= GND.
Parameters
Symbol
T
A
T
A
T
A
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
θ
JA
Min
-40
-40
-65
—
—
—
—
—
—
Typ
—
—
—
85
163
206
70
108
100
Max
+85
+125
+150
—
—
—
—
—
—
Units
°C
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Note 1
Conditions
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-MSOP
Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
Note 1:
The MCP6141/2/3/4 family of op amps operates over this extended range, but with reduced performance.
2002 Microchip Technology Inc.
21668A-page 3
MCP6141/2/3/4
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, V
DD
= +5V, V
SS
= GND, T
A
= 25°C, V
CM
= V
DD
/2, R
L
= 1 MΩ to V
DD
/2, C
L
= 60 pF,
and V
OUT
~ V
DD
/2.
16%
14%
12%
10%
8%
6%
4%
2%
0%
-3
-2
-1
0
1
2
3
Input Offset Voltage (mV)
35%
30%
25%
20%
15%
10%
5%
0%
-10
-5
0
5
10
Input Offset Voltage Drift (µV/°C)
Percentage of Occurrences
FIGURE 2-1:
Histogram of Input Offset
Voltage with V
DD
= 5.5V.
16%
14%
12%
10%
8%
6%
4%
2%
0%
-3
-2
-1
0
1
2
3
Input Offset Voltage (mV)
FIGURE 2-4:
Histogram of Input Offset
Voltage Drift with V
DD
= 1.4V.
600
Input Offset Voltage (µV)
Percentage of Occurrences
1200 Samples
V
DD
= 5.5 V
1200 Samples
V
DD
= 1.4 V
Percentage of Occurrences
1200 Samples
V
DD
= 1.4 V
V
DD
= 1.4 V
400
200
0
-200
-400
-600
-0.5
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
0.0
0.5
1.0
1.5
Common Mode Input Voltage (V)
2.0
FIGURE 2-2:
Histogram of Input Offset
Voltage with V
DD
= 1.4V.
35%
30%
25%
20%
15%
10%
5%
0%
-10
-5
0
5
10
Input Offset Voltage Drift (µV/°C)
FIGURE 2-5:
Input Offset Voltage vs.
Common Mode Input Voltage vs. Temperature
with V
DD
= 1.4V.
600
Input Offset Voltage (µV)
V
DD
= 5.5 V
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
Percentage of Occurrences
1200 Samples
V
DD
= 5.5 V
400
200
0
-200
-400
-600
-0.5
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
0.5
1.5
2.5
3.5
4.5
Common Mode Input Voltage (V)
5.5
FIGURE 2-3:
Histogram of Input Offset
Voltage Drift with V
DD
= 5.5V.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage vs. Temperature
with V
DD
= 5.5V.
2002
Microchip Technology Inc.
21668A-page 4
MCP6141/2/3/4
Note:
Unless otherwise indicated, V
DD
= +5V, V
SS
= GND, T
A
= 25°C, V
CM
= V
DD
/2, R
L
= 1 MΩ to V
DD
/2, C
L
= 60 pF,
and V
OUT
~ V
DD
/2.
Input Bias, Offset Currents (pA)
500
Input Offset Voltage (µV)
R
L
= 50 k
450
400
350
300
250
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
V
DD
= 5.5 V
V
DD
= 1.4 V
50
40
30
20
10
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
T
A
= 85°C
V
DD
= 5.5 V
Input Bias Current
Input Offset Current
FIGURE 2-7:
Input Offset Voltage vs.
Output Voltage vs. Power Supply Voltage.
FIGURE 2-10:
Input Bias, Offset Currents
vs. Common Mode Input Voltage with
Temperature = 85°C.
300
1,000
Input Noise Voltage Density
(nV/ Hz)
E
ni
= 4.7 µV
P-P
, f = 0.1 to 10 Hz
e
ni
= 167 nV/ Hz, f = 1 kHz
Input Noise Voltage Density
(nV/ Hz)
250
200
150
100
50
0
-0.5
f = 1 kHz
V
DD
= 5.0 V
100
0.1
1
10
100
Frequency (Hz)
1000
0.5
1.5
2.5
3.5
4.5
5.5
Common Mode Input Voltage (V)
FIGURE 2-8:
vs. Frequency.
100
90
CMRR, PSRR (dB)
80
70
60
50
40
30
20
1
Input Noise Voltage Density
FIGURE 2-11:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
100
CMRR, PSRR (dB)
95
90
85
80
75
70
-40
-20
CMRR (V
DD
= 5.0 V,
V
CM
= -0.3 V to +5.3 V)
0
20
40
60
Ambient Temperature (°C)
80
PSRR (V
CM
= V
SS
)
PSRR-
V
DD
= 5.0 V
PSRR+ Referred to Input
CMRR
10
100
100
1000
Frequency (Hz)
FIGURE 2-9:
Common Mode Rejection
Ratio, Power Supply Rejection Ratio vs.
Frequency.
FIGURE 2-12:
Common Mode Rejection
Ratio, Power Supply Rejection Ratio vs. Ambient
Temperature.
2002 Microchip Technology Inc.
21668A-page 5
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