MCP2025
LIN Transceiver with Voltage Regulator
Features:
• Compliant with LIN Bus Specifications Version
1.3, 2.1 and with SAE J2602-2
• Supports Baud Rates up to 20 kBaud
• 43V Load Dump Protected
• Maximum Continuous Input Voltage: 30V
• Wide LIN-Compliant Supply Voltage: 6.0-18.0V
• Extended Temperature Range: -40°C to +125°C
• Interface to PIC
®
EUSART and Standard USARTs
• Wake-Up on LIN Bus Activity or Local Wake Input
• Local Interconnect Network (LIN) Bus Pin:
- Internal Pull-Up Termination Resistor and
Diode for Slave Node
- Protected Against V
BAT
Shorts
- Protected Against Loss of Ground
- High-Current Drive
• T
XD
and LIN Bus Dominant Time-Out Function
• Two Low-Power Modes:
- Transmitter Off: 90 µA (typical)
- Power Down: 4.5 µA (typical)
• MCP2025 On-Chip Voltage Regulator:
- Output Voltage of 5.0V or 3.3V
at 70 mA Capability with Tolerances of ±3%
Over the Temperature Range
- Internal Short-Circuit Current Limit
- External Components Limited to Filter
Capacitor and Load Capacitor
• Automatic Thermal Shutdown
• High Electromagnetic Immunity (EMI), Low
Electromagnetic Emission (EME)
• Robust ESD Performance: ±15 kV for L
BUS
and
V
BB
Pin (IEC61000-4-2)
• Transient Protection for L
BUS
and V
BB
pins in
Automotive Environment (ISO7637)
• Meets Stringent Automotive Design Requirements,
including “OEM Hardware Requirements for LIN,
CAN and FlexRay Interfaces in Automotive
Applications”, Version 1.3, May 2012
• Multiple Package Options, Including Small
4x4 mm DFN Package
Description:
The MCP2025 provides a bidirectional, half-duplex
communication physical interface to meet the LIN bus
specification Revision 2.1 and SAE J2602-2. The
device incorporates a voltage regulator with 5V or 3.3V
at 70 mA regulated power supply output. The device
has been designed to meet the stringent quiescent
current requirements of the automotive industry, and
will survive +43V load dump transients and double
battery jumps.
The MCP2025 family members include:
- MCP2025-500, 8-pin, LIN driver with 5.0V
regulator
- MCP2025-330, 8-pin, LIN driver with 3.3V
regulator
Package Types
MCP2025
PDIP, SOIC
V
BB
CS/LWAKE
V
SS
L
BUS
1
2
3
4
8
7
6
5
V
REG
RESET
T
XD
R
XD
MCP2025
4x4 DFN
V
BB
CS/LWAKE
V
SS
L
BUS
1
2
3
4
EP
9
8 V
REG
7 RESET
6 T
XD
5 R
XD
2012-2014 Microchip Technology Inc.
DS20002306B-page 1
MCP2025
MCP2025 Block Diagram
Thermal
Protection
Short-Circuit
Protection
Voltage
Regulator
Ratiometric
Reference
V
REG
Internal Circuits
V
REG
R
XD
CS/LWAKE
T
XD
Bus
Dominant
Timer
Thermal and
Short-Circuit
Protection
~ 30 k
4.2V
Wake-Up Logic
and
Power Control
RESET
V
BB
Bus Wake-Up
Slope Control
L
BUS
V
SS
DS20002306B-page 2
2012-2014 Microchip Technology Inc.
MCP2025
1.0
DEVICE OVERVIEW
1.1
Modes of Operation
The MCP2025 provides a physical interface between a
microcontroller and a LIN half-duplex bus. It is intended
for automotive and industrial applications with serial
bus baud rates up to 20 kBaud. This device will
translate the CMOS/TTL logic levels to LIN logic levels,
and vice versa.
The device offers optimum EMI and ESD performance
and it can withstand high voltage on the LIN bus. The
device supports two low-power modes to meet
automotive industry power consumption requirements.
The MCP2025 also provides a +5V or 3.3V regulated
power output at 70 mA.
The MCP2025 works in five modes: Power-On Reset,
Power-Down, Ready, Operation and Transmitter Off.
For an overview of all operational modes, please refer
to
Table 1-1.
For the operational mode transition,
please refer to
Figure 1-1.
FIGURE 1-1:
STATE DIAGRAM
CS/LWAKE =
0
POR
(2)
V
REG
OFF
RX OFF
TX OFF
V
BB
> V
ON
READY
V
REG
ON
RX ON
TX OFF
CS/LWAKE =
1 &T
XD
=
1
VREG_OK =
1
(1)
CS =
1 &T
XD
=
0&
CS/LWAKE =
1
OR
Voltage Rising Edge on L
BUS
CS/LWAKE =
1&
T
XD
=
1&
No Fault
(3)
OPERATION
V
REG
ON
RX ON
TX ON
TX OFF
V
REG
ON
RX ON
TX OFF
CS/LWAKE =
0
&T
XD
=
0
POWER-DOWN
V
REG
OFF
RX OFF
TX OFF
CS/LWAKE =
0
or
Fault detected
(3)
Note 1:
VREG_OK: Regulator Output Voltage > 0.8V
REG
_
NOM
.
2:
If the voltage on pin V
BB
falls below V
OFF
, the device will enter Power-On Reset mode from all other
modes, which is not shown in the figure.
3:
Faults include T
XD
/L
BUS
permanent dominant, L
BUS
short to V
BB
, thermal protection and VREG_OK is
false.
2012-2014 Microchip Technology Inc.
DS20002306B-page 3
MCP2025
1.1.1
POWER-ON RESET MODE
1.1.4
TRANSMITTER OFF MODE
Upon application of V
BB
, or whenever the voltage on
V
BB
is below the threshold of regulator turn-off voltage
V
OFF
(typically 4.50V), the device enters Power-On
Reset (POR) mode. During this mode, the device
maintains the digital section in a Reset mode and waits
until the voltage on the V
BB
pin rises above the
threshold of regulator turn-on voltage V
ON
(typically
5.75V) to enter Ready mode. In Power-On Reset
mode, the LIN physical layer and voltage regulator are
disabled and the RESET pin is switched to ground.
If V
REG
is OK (V
REG
> 0.8*V
REG
_
NOM
), the Transmitter
Off mode can be reached from Ready mode by setting
CS/LWAKE to high when the T
XD
pin is low, or from
Operation mode by pulling down CS/LWAKE to low.
In Transmitter Off mode, the receiver is enabled but the
L
BUS
transmitter is off. It is a lower-power mode.
In order to minimize power consumption, the regulator
operates in a reduced-power mode. It has a lower
GBW product and it is thus slower. However, the 70 mA
drive capability is unchanged.
The transmitter is also turned off whenever the voltage
regulator is unstable or recovering from a fault. This
prevents unwanted disruption on the bus during times
of uncertain operation.
1.1.2
READY MODE
The device enters Ready mode from POR mode after
the voltage on V
BB
rises above the threshold of
regulator turn-on voltage V
ON
, or from Power-Down
mode when a remote or local wake-up event happens.
Upon entering Ready mode, the voltage regulator and
the receiver section of the transceiver are powered-up.
The transmitter remains in an off state. The device is
ready to receive data, but not to transmit. In order to
minimize the power consumption, the regulator
operates in a reduced-power mode. It has a lower
GBW product and it is thus slower. However, the 70 mA
drive capability is unchanged.
The device stays in Ready mode until the output of the
voltage regulator has stabilized and the CS/LWAKE pin
is high (‘1’).
1.1.5
POWER-DOWN MODE
Power-Down mode is entered by pulling down both the
CS/LWAKE pin and the T
XD
pin to low from Transmitter
Off mode. In Power-Down mode, the transceiver and
the voltage regulator are both off. Only the bus wake-up
section and the CS/LWAKE pin wake-up circuits are in
operation. This is the lowest-power mode.
If any bus activity (e.g., a Break character) occurs or
CS/LWAKE is set to high during Power-Down mode,
the device will immediately enter Ready mode and
enable the voltage regulator. Then, once the regulator
output has stabilized (approximately 0.3 ms to 1.2 ms),
it can go into either Operation mode or Transmitter Off
mode. Refer to
Section 1.1.6 “Remote Wake-Up”
for
more details.
1.1.3
OPERATION MODE
If the CS/LWAKE pin changes to high while V
REG
is OK
(V
REG
> 0.8*V
REG
_
NOM
) and the T
XD
pin is high, the
part enters Operation mode from either Ready or
Transmitter Off mode.
In this mode, all internal modules are operational. The
internal pull-up resistor between L
BUS
and V
BB
is
connected only in this mode.
The device goes into Transmitter Off mode at the falling
edge on the CS/LWAKE pin or when a fault is detected.
Note:
The T
XD
pin needs to be set high before
setting the CS/LWAKE pin to low in order
to jump and stay in Transmitter Off mode.
If the T
XD
pin is set or maintained low
before setting the CS/LWAKE pin to low,
the part will transition to Transmitter Off
mode and then jump to Power-Down
mode after a deglitch delay of about
20 µs.
1.1.6
REMOTE WAKE-UP
The Remote Wake-Up sub-module observes the L
BUS
in order to detect bus activity. In Power-Down mode,
the normal LIN recessive/dominant threshold is
disabled and the LIN bus wake-up voltage threshold
V
WK
(
LBUS
) is used to detect bus activities. Bus activity
is detected when the voltage on the L
BUS
falls below
the LIN bus wake-up voltage threshold V
WK
(
LBUS
)
(approximately 3.4V) for at least t
BDB
(a typical duration
of 80 µs) followed by a rising edge. Such a condition
causes the device to leave Power-Down mode.
DS20002306B-page 4
2012-2014 Microchip Technology Inc.
MCP2025
TABLE 1-1:
State
POR
Ready
Operation
OVERVIEW OF OPERATIONAL MODES
Internal
Voltage
Transmitter Receiver Wake
Regulator
Module
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
ON
Operation
Proceed to Ready mode after
V
BB
> V
ON
.
Comments
—
If CS/LWAKE is high, then proceed to Bus Off
Operation or Transmitter Off mode.
state
If CS/LWAKE is low, then proceed to
Transmitter Off mode.
Normal
Operation
mode
Power-Down
OFF
OFF
ON
Activity
Detect
OFF
OFF
On LIN bus rising edge or CS/LWAKE Lowest-
high level, go to Ready mode.
Power
mode
If T
XD
and CS/LWAKE are low, then
proceed to Power-Down mode.
If T
XD
and CS/LWAKE are high, then
proceed to Operation mode.
Bus Off
state,
lower-power
mode
Transmitter Off
OFF
ON
ON
2012-2014 Microchip Technology Inc.
DS20002306B-page 5
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