Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
, V
out
T
A
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
Min
4.5
0
–55
0
Max
5.5
V
CC
+125
500
Unit
V
V
_C
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Guaranteed Limit
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum High−Level Input
Voltage
Maximum Low−Level Input
Voltage
Minimum High−Level Output
Voltage
Test Conditions
V
out
= 0.1 V or V
CC
– 0.1 V
|I
out
|
≤
20
mA
V
out
= 0.1 V or V
CC
– 0.1 V
|I
out
|
≤
20
mA
V
in
= V
IH
or V
IL
|I
out
|
≤
20
mA
V
in
= V
IH
or V
IL
|I
out
|
≤
4.0 mA
V
OL
Maximum Low−Level Output
Voltage
V
in
= V
IH
or V
IL
|I
out
|
≤
20
mA
V
in
= V
IH
or V
IL
|I
out
|
≤
4.0 mA
I
in
I
CC
Maximum Input Leakage Current
Maximum Quiescent Supply
Current (per Package)
Additional Quiescent Supply
Current
V
in
= V
CC
or GND
V
in
= V
CC
or GND
I
out
= 0
mA
V
in
= 2.4 V, Any One Input
V
in
= V
CC
or GND, Other Inputs
l
out
= 0
mA
V
CC
V
4.5
5.5
4.5
5.5
4.5
5.5
4.5
4.5
5.5
4.5
5.5
5.5
–55 to
25_C
2.0
2.0
0.8
0.8
4.4
5.4
3.98
0.1
0.1
0.26
±
0.1
2.0
≤
85_C
2.0
2.0
0.8
0.8
4.4
5.4
3.84
0.1
0.1
0.33
±
1.0
20
≤
125_C
2.0
2.0
0.8
0.8
4.4
5.4
3.7
0.1
0.1
0.4
±
1.0
80
mA
mA
V
Unit
V
V
V
DI
CC
≥
−55_C
5.5
2.9
25_C to 125_C
2.4
mA
http://onsemi.com
2
MC74HCT74A
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0 V
±
10%, C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns)
Guaranteed Limit
Symbol
f
max
t
PLH
,
t
PHL
t
PLH
,
t
PHL
t
TLH
,
t
THL
C
in
Parameter
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
Maximum Propagation Delay, Clock to Q or Q
(Figures 1 and 4)
Maximum Propagation Delay, Set or Reset to Q or Q
(Figures 2 and 4)
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
Maximum Input Capacitance
–55 to
25_C
30
≤
85_C
24
≤
125_C
20
Unit
MHz
24
30
36
ns
24
30
36
ns
15
19
22
ns
10
10
10
pF
Typical @ 25°C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance (Per Enabled Output)*
32
pF
1. Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC2
f + I
CC
V
CC
.
ÎÎÎ Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎ Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
ÎÎÎ Î Î Î ÎÎ Î Î
Î
Î
Î Î Î Î ÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ Î
Î
Î Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TIMING REQUIREMENTS
(V
CC
= 5.0 V
±
10%, C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns)
Guaranteed Limit
≤
85_C
–55 to
25_C
≤
125_C
Symbol
t
su
t
h
Parameter
Fig.
3
3
2
1
2
1
Min
15
3
6
Max
Min
19
3
8
Max
Min
22
3
9
Max
Units
ns
ns
ns
ns
ns
ns
Minimum Setup Time, Data to Clock
Minimum Hold Time, Clock to Data
t
rec
t
w
t
w
Minimum Recovery Time, Set or Reset Inactive to Clock
Minimum Pulse Width, Clock
15
15
19
19
22
22
Minimum Pulse Width, Set or Reset
t
r
, t
f
Maximum Input Rise and Fall Times
500
500
500
ORDERING INFORMATION
Device
MC74HCT74ADG
MC74HCT74ADR2G
Package
SOIC−14 NB
(Pb−Free)
SOIC−14 NB
(Pb−Free)
Shipping
†
55 Units / Rail
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
3
MC74HCT74A
SWITCHING WAVEFORMS
t
w
t
r
CLOCK
2.7 V
1.3 V
0.3 V
t
w
1/f
max
t
PLH
Q OR Q
90%
1.3 V
10%
CLOCK
t
TLH
t
THL
t
PHL
Q OR Q
t
f
3V
GND
Q OR Q
SET OR
RESET
3V
1.3 V
GND
t
PHL
1.3 V
t
PLH
1.3 V
t
rec
3V
1.3 V
GND
Figure 1.
Figure 2.
VALID
3V
DATA
1.3 V
GND
t
su
t
h
3V
1.3 V
CLOCK
*Includes all probe and jig capacitance
GND
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C
L
*
Figure 3.
Figure 5.
SET
4, 10
2, 12
DATA
5, 9
Q
3, 11
CLOCK
6, 8
Q
1, 13
RESET
Figure 4. Expanded Logic Diagram
http://onsemi.com
4
MC74HCT74A
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
D
14
A
B
8
A3
H
1
7
E
L
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0
_
7
_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0
_
7
_
0.25
M
B
M
13X
b
0.25
M
C A
A
S
B
S
X 45
_
h
DETAIL A
e
A1
C
SEATING
PLANE
M
SOLDERING FOOTPRINT*
6.50
1
14X
1.18
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
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