VS-VSK.41.., VS-VSK.56.. Series
www.vishay.com
Vishay Semiconductors
AAP Gen 7 (TO-240AA) Power Modules
Thyristor/Diode and Thyristor/Thyristor, 45 A, 60 A
FEATURES
• High voltage
• Industrial standard package
• Low thermal resistance
• UL approved file E78996
• Designed and qualified for industrial level
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
BENEFITS
ADD-A-PAK
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
• Up to 1600 V
45 A, 60 A
PRIMARY CHARACTERISTICS
I
T(AV)
or I
F(AV)
Type
Package
Modules - thyristor, standard
AAP Gen 7 (TO-240AA)
• High surge capability
• Easy mounting on heatsink
ELECTRICAL DESCRIPTION
MECHANICAL DESCRIPTION
The AAP Gen 7 (TO-240AA), new generation of AAP module,
combines the excellent thermal performances obtained by
the usage of exposed direct bonded copper substrate, with
advanced compact simple package solution and simplified
internal structure with minimized number of interfaces.
These modules are intended for general purpose high
voltage applications such as high voltage regulated power
supplies, lighting circuits, temperature and motor speed
control circuits, UPS, and battery charger.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
I
T(AV)
or I
F(AV)
I
O(RMS)
I
TSM,
I
FSM
I
2
t
I
2
t
V
DRM
/V
RRM
T
Stg
T
J
Range
CHARACTERISTICS
85 °C
As AC switch
50 Hz
60 Hz
50 Hz
60 Hz
VS-VSK.41
45
100
850
890
3.61
3.30
36.1
400 to 1600
-40 to +125
-40 to +125
VS-VSK.56
60
135
1200
1256
7.20
6.57
72
400 to 1600
kA
2
s
kA
2
s
V
°C
°C
A
UNITS
Revision: 26-Jul-2018
Document Number: 94630
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSK.41.., VS-VSK.56.. Series
www.vishay.com
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
04
06
VS-VSK.41
VS-VSK.56
08
10
12
14
16
V
RRM
, MAXIMUM
REPETITIVE PEAK
REVERSE VOLTAGE
V
400
600
800
1000
1200
1400
1600
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
500
700
900
1100
1300
1500
1700
V
DRM
, MAXIMUM REPETITIVE
PEAK OFF-STATE VOLTAGE,
GATE OPEN CIRCUIT
V
400
600
800
1000
1200
1400
1600
15
I
RRM,
I
DRM
AT 125 °C
mA
Vishay Semiconductors
ON-STATE CONDUCTION
PARAMETER
Maximum average on-state current (thyristors)
Maximum average forward current (diodes)
Maximum continuous RMS on-state current,
as AC switch
SYMBOL
I
T(AV)
I
F(AV)
TEST CONDITIONS
180° conduction, half sine wave,
T
C
= 85 °C
or
VSK.41 VSK.56
45
60
UNITS
I
O(RMS)
I
(RMS)
I
(RMS)
100
135
A
t = 10 ms
Maximum peak, one-cycle non-repetitive
on-state or forward current
I
TSM
or
I
FSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
t
for fusing
Maximum value or threshold voltage
Maximum value of on-state
slope resistance
Maximum peak on-state or forward voltage
Maximum non-repetitive rate of rise of
turned on current
Maximum holding current
Maximum latching current
Notes
(1)
I
2
t for time t = I
2
t
x
t
x
x
(2)
Average power = V
2
T(TO)
x I
T(AV)
+ r
t
x (I
T(RMS)
)
(3)
16.7 % x
x I
AV
< I <
x I
AV
(4)
I >
x I
AV
I
2
t
(1)
V
T(TO) (2)
r
t (2)
V
TM
V
FM
dI/dt
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
Sinusoidal
half wave,
initial T
J
=
T
J
maximum
850
890
715
750
3.61
1200
1256
1000
1056
7.20
6.57
5.10
4.56
72
0.91
1.02
4.27
3.77
1.7
150
200
kA
2
s
V
kA
2
s
Initial T
J
=
T
J
maximum
3.30
2.56
2.33
36.1
1.08
1.12
4.7
4.5
1.81
t = 0.1 ms to 10 ms, no voltage reapplied
T
J
= T
J
maximum
Low level
(3)
High level
(4)
Low level
(3)
High level
(4)
I
TM
=
x I
T(AV)
I
FM
=
x I
F(AV)
T
J
= T
J
maximum
T
J
= T
J
maximum
T
J
= 25 °C
m
V
A/μs
T
J
= 25 °C, from 0.67 V
DRM
,
I
TM
=
x I
T(AV)
, I
g
= 500 mA, t
r
< 0.5 μs, t
p
> 6 μs
T
J
= 25 °C, anode supply = 6 V,
resistive load, gate open circuit
T
J
= 25 °C, anode supply = 6 V, resistive load
400
mA
400
Revision: 26-Jul-2018
Document Number: 94630
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSK.41.., VS-VSK.56.. Series
www.vishay.com
Vishay Semiconductors
SYMBOL
P
GM
P
G(AV)
I
GM
- V
GM
T
J
= -40 °C
V
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
Anode supply = 6 V
resistive load
TEST CONDITIONS
VS-VSK.41 VS-VSK.56
10
2.5
2.5
10
4.0
2.5
1.7
270
Anode supply = 6 V
resistive load
150
80
0.25
6
V
mA
mA
V
UNITS
W
A
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak gate current
Maximum peak negative gate voltage
Maximum gate voltage required to trigger
Maximum gate current required to trigger
I
GT
V
GD
I
GD
T
J
= 25 °C
T
J
= 125 °C
Maximum gate voltage that will not trigger
Maximum gate current that will not trigger
T
J
= 125 °C, rated V
DRM
applied
T
J
= 125 °C, rated V
DRM
applied
BLOCKING
PARAMETER
Maximum peak reverse and off-state
leakage current at V
RRM
, V
DRM
Maximum RMS insulation voltage
Maximum critical rate of rise of off-state voltage
SYMBOL
I
RRM,
I
DRM
V
INS
dV/dt
TEST CONDITIONS
T
J
= 125 °C, gate open circuit
50 Hz
T
J
= 125 °C, linear to 0.67 V
DRM
VS-VSK.41 VS-VSK.56
15
3000 (1 min)
3600 (1 s)
1000
UNITS
mA
V
V/μs
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Junction operating and storage
temperature range
Maximum internal thermal resistance,
junction to case per leg
Typical thermal resistance,
case to heatsink per module
to heatsink
Mounting torque ± 10 %
busbar
Approximate weight
Case style
JEDEC
®
SYMBOL
T
J
, T
Stg
R
thJC
R
thCS
DC operation
Mounting surface flat, smooth and
greased
A mounting compound is recommended
and the torque should be rechecked after
a period of 3 hours to allow for the spread
of the compound.
TEST CONDITIONS
VS-VSK.41 VS-VSK.56
-40 to +125
0.44
0.1
4
Nm
3
75
2.7
AAP Gen 7 (TO-240AA)
g
oz.
0.35
°C/W
UNITS
°C
R
CONDUCTION PER JUNCTION
DEVICES
VSK.41..
VSK.56..
SINE HALF WAVE CONDUCTION
180°
0.110
0.088
120°
0.131
0.104
90°
0.17
0.134
60°
0.23
0.184
30°
0.342
0.273
180°
0.085
0.07
RECTANGULAR WAVE CONDUCTION
120°
0.138
0.111
90°
0.177
0.143
60°
0.235
0.189
30°
0.345
0.275
UNITS
°C/W
Note
• Table shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 26-Jul-2018
Document Number: 94630
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSK.41.., VS-VSK.56.. Series
www.vishay.com
Vishay Semiconductors
Maximum average on-state power loss (W)
Maximum allowable case temperature (°C)
130
VSK.41 Series
RthJC (DC) = 0.44°C/W
120
100
80
60
40
20
0
0
10
20
30
40
50
60
70
80
Average on-state current (A)
180°
120°
90°
60°
30°
120
DC
110
RMS limit
100
180°
120°
90°
60°
30°
90
VSK.41 Series
Per leg, Tj = 125°C
80
0
10
20
30
40
50
Average on-state current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - On-State Power Loss Characteristics
Maximum allowable case temperature (°C)
130
Peak half sine wave on-state current (A)
800
VSK.41 Series
RthJC (DC) = 0.44 °C/W
120
110
100
90
80
70
0
700
At any rated load condition and with
rated Vrrm applied following surge
Initial Tj = Tj max
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100s
600
DC
180°
120°
90°
60°
30°
500
400
Per leg
300
1
10
100
Number of equal amplitude half cycle current pulses (N)
10
20
30
40
50
60
70
80
Average on-state current (A)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - Maximum Non-Repetitive Surge Current
Maximum average on-state power loss (W)
80
Peak half sine wave on-state current (A)
900
180°
120°
90°
60°
30°
70
60
50
40
30
20
10
0
0
800
700
600
500
400
RMS limit
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration. Control
of conduction may not be maintaned.
Initial Tj = 125°C
No Voltage Reapplied
Rated Vrrm reapplied
VSK.41 Series
Per leg, Tj = 125°C
Per leg
5 10 15 20 25 30 35 40 45 50
Average on-state current (A)
300
0.01
0.1
Pulse train duration (s)
1
Fig. 3 - On-State Power Loss Characteristics
Fig. 6 - Maximum Non-Repetitive Surge Current
Revision: 26-Jul-2018
Document Number: 94630
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-VSK.41.., VS-VSK.56.. Series
www.vishay.com
160
Maximum total on-state power loss (W)
Vishay Semiconductors
RthSA = 0.1 °C/W
0.3 °C/W
0.5 °C/W
0.7 °C/W
1 °C/W
1.5 °C/W
2 °C/W
3 °C/W
5 °C/W
140
120
100
80
60
40
20
0
0
20
40
180°
120°
90°
60°
30°
VSK.41 Series
Per module
Tj = 125°C
60
80
100
0
20
40
60
80
100 120 140
Total RMS output current (A)
Maximum allowable ambient temperature (°C)
Fig. 7 - On-State Power Loss Characteristics
350
Maximum total power loss (W)
300
250
200
∼
180°
(sine)
180°
(rect)
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
0.7 °C/W
1 °C/W
1.5 °C/W
150
100
50
0
0
20
40
60
80
0
100
20
40
60
80
100 120 140
Total output current (A)
Maximum allowable ambient temperature (°C)
2 x VSK.41 Series
single phase bridge connected
Tj = 125°C
Fig. 8 - On-State Power Loss Characteristics
500
Maximum total power loss (W)
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
0.7 °C/W
1 °C/W
400
120°
(rect)
300
200
100
3 x VSK.41 Series
three phase bridge connected
Tj = 125°C
0
0
20
40
60
80
100 120 140
0
20
40
60
80
100 120 140
Total output current (A)
Maximum allowable ambient temperature (°C)
Fig. 9 - On-State Power Loss Characteristics
Revision: 26-Jul-2018
Document Number: 94630
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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