74HC4052; 74HCT4052
Rev. 12 — 10 October 2017
Dual 4-channel analog multiplexer/demultiplexer
Product data sheet
1
General description
The 74HC4052; 74HCT4052 is a dual single-pole quad-throw analog switch (2x SP4T)
suitable for use in analog or digital 4:1 multiplexer/demultiplexer applications. Each
switch features four independent inputs/outputs (nY0, nY1, nY2 and nY3) and a common
input/output (nZ). A digital enable input (E) and two digital select inputs (S0 and S1) are
common to both switches. When E is HIGH, the switches are turned off. Inputs include
clamp diodes. This enables the use of current limiting resistors to interface inputs to
voltages in excess of V
CC
.
2
Features and benefits
•
Wide analog input voltage range from -5 V to +5 V
•
Low ON resistance:
–
80 Ω (typical) at V
CC
- V
EE
= 4.5 V
–
70 Ω (typical) at V
CC
- V
EE
= 6.0 V
–
60 Ω (typical) at V
CC
- V
EE
= 9.0 V
•
Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
•
Typical ‘break before make’ built-in
•
Complies with JEDEC standard no. 7A
•
Input levels:
–
For 74HC4052: CMOS level
–
For 74HCT4052: TTL level
•
ESD protection:
–
HBM JESD22-A114F exceeds 2000 V
–
MM JESD22-A115-A exceeds 200 V
–
CDM JESD22-C101E exceeds 1000 V
•
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3
Applications
•
Analog multiplexing and demultiplexing
•
Digital multiplexing and demultiplexing
•
Signal gating
Nexperia
Dual 4-channel analog multiplexer/demultiplexer
74HC4052; 74HCT4052
4
Ordering information
Package
Temperature range
Name
SO16
SSOP16
TSSOP16
DHVQFN16
Description
plastic small outline package; 16 leads; body
width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
plastic dual-in line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 x 3.5 x 0.85 mm
Version
SOT109-1
SOT338-1
SOT403-1
SOT763-1
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
Table 1. Ordering information
Type number
74HC4052D
74HCT4052D
74HC4052DB
74HCT4052DB
74HC4052PW
74HCT4052PW
74HC4052BQ
74HCT4052BQ
5
Functional diagram
10
0
1
G4
MDX
4×
0
3
13
1Z
10
9
S0
S1
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
6
E
2Z
3
001aah824
9
6
12
14
15
11
1
5
2
4
13
3
0
1
2
3
1
5
2
4
12
14
15
11
001aah825
2Y3
Figure 1. Logic symbol
Figure 2. IEC logic symbol
74HC_HCT4052
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 12 — 10 October 2017
2 / 28
Nexperia
Dual 4-channel analog multiplexer/demultiplexer
74HC4052; 74HCT4052
nYn
V
CC
V
EE
V
CC
V
CC
V
CC
from
logic
V
EE
nZ
V
EE
mnb043
Figure 3. Schematic diagram (one switch)
V
DD
16
13
12
1Z
1Y0
14
1Y1
15
S0
10
1Y2
11
S1
9
LOGIC
LEVEL
CONVERSION
1-OF-4
DECODER
1
1Y3
2Y0
E
6
5
2Y1
2
2Y2
4
2Y3
8
V
SS
7
V
EE
3
2Z
001aah872
Figure 4. Functional diagram
74HC_HCT4052
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 12 — 10 October 2017
3 / 28
Nexperia
Dual 4-channel analog multiplexer/demultiplexer
74HC4052; 74HCT4052
6
Pinning information
6.1 Pinning
74HC4052
74HCT4052
terminal 1
index area
16 V
CC
15 1Y2
14 1Y1
13 1Z
12 1Y0
V
CC(1)
8
9
S1
11 1Y3
10 S0
GND
2Y0
2
3
4
5
6
7
1
74HC4052
74HCT4052
2Y0
2Y2
2Z
2Y3
2Y1
E
V
EE
GND
1
2
3
4
5
6
7
8
001aah822
2Y2
2Z
16 V
CC
15 1Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
10 S0
9
S1
2Y3
2Y1
E
V
EE
001aah823
Transparent top view
(1) This is not a supply pin. The substrate is attached
to this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder this
pad.However, if it is soldered, the solder land should remain
floating or be connected to V
CC
.
Figure 6. Pin configuration for DHVQFN16
Figure 5. Pin configuration for SO16 and (T)SSOP16
6.2 Pin description
Table 2. Pin description
Symbol
2Y0, 2Y1, 2Y2, 2Y3
1Z, 2Z
E
V
EE
GND
S0, S1
1Y0, 1Y1, 1Y2, 1Y3
V
CC
Pin
1, 5, 2, 4
13, 3
6
7
8
10, 9
12, 14, 15, 11
16
Description
independent input or output
common input or output
enable input (active LOW)
negative supply voltage
ground (0 V)
select logic input
independent input or output
positive supply voltage
74HC_HCT4052
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 12 — 10 October 2017
4 / 28
Nexperia
Dual 4-channel analog multiplexer/demultiplexer
74HC4052; 74HCT4052
7
Functional description
[1]
Table 3. Function table
Input
E
L
L
L
L
H
Channel on
S1
L
L
H
H
X
S0
L
H
L
H
X
nY0 and nZ
nY1 and nZ
nY2 and nZ
nY3 and nZ
none
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referenced to V
EE
= GND (ground = 0 V).
Symbol
V
CC
I
IK
I
SK
I
SW
I
EE
I
CC
I
GND
T
stg
P
tot
P
Parameter
supply voltage
input clamping current
switch clamping current
switch current
supply current
supply current
ground current
storage temperature
total power dissipation
power dissipation
SO16, SSOP16, TSSOP16 and
DHVQFN16 package
per switch
[2]
Conditions
[1]
Min
-0.5
-
-
-
-
-
-
-65
-
-
Max
+11.0
±20
±20
±25
±20
50
-50
+150
500
100
Unit
V
mA
mA
mA
mA
mA
mA
°C
mW
mW
V
I
< -0.5 V or V
I
> V
CC
+ 0.5 V
V
SW
< -0.5 V or V
SW
> V
CC
+ 0.5 V
-0.5 V < V
SW
< V
CC
+ 0.5 V
[1] To avoid drawing V
CC
current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V.
If the switch current flows into pins nZ, no V
CC
current will flow out of pins nYn. In this case there is no limit for the voltage drop across the switch, but the
voltages at pins nYn and nZ may not exceed V
CC
or V
EE
.
[2] For SO16 packages: above 70 °C the value of P
tot
derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 °C the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 °C the value of P
tot
derates linearly with 4.5 mW/K.
74HC_HCT4052
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 12 — 10 October 2017
5 / 28
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