TSM80N1R2
Taiwan Semiconductor
N-Channel Power MOSFET
800V, 5.5A, 1.2Ω
FEATURES
● Super-Junction technology
● High performance due to small figure-of-merit
● High ruggedness performance
● High commutation performance
● Pb-free plating
● Compliant to RoHS Directive 2011/65/EU and in
accordance to WEE 2002/96/EC
● Halogen-free according to IEC 61249-2-21
definition
KEY PERFORMANCE PARAMETERS
PARAMETER
V
DS
R
DS(on)
(max)
Q
g
VALUE
800
1.2
19.4
UNIT
V
Ω
nC
APPLICATION
● Power Supply
● Lighting
TO-251 (IPAK)
TO-252 (DPAK)
Notes:
MSL 3 (Moisture Sensitivity Level) for TO-252 (D-PAK) per J-STD-020
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
(Note 1)
SYMBOL
V
DS
V
GS
T
C
= 25°C
T
C
= 100°C
I
D
I
DM
P
DTOT
E
AS
I
AS
T
J
, T
STG
(Note 3)
(Note 3)
LIMIT
800
±30
5.5
3.4
16.5
110
121
2.2
- 55 to +150
UNIT
V
V
A
A
A
W
mJ
A
°C
(Note 2)
Total Power Dissipation @ T
C
= 25°C
Single Pulsed Avalanche Energy
Single Pulsed Avalanche Current
Operating Junction and Storage Temperature Range
Document Number:DS_P0000176
1
Version: B1706
TSM80N1R2
Taiwan Semiconductor
THERMAL PERFORMANCE
PARAMETER
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance
SYMBOL
R
ӨJC
R
ӨJA
LIMIT
1.14
62
UNIT
°C/W
°C/W
Notes:
R
ӨJA
is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. R
ӨJA
is guaranteed by design while R
ӨCA
is determined by the user’s board
design. R
ӨJA
shown below for single device operation on FR-4 PCB with minimum recommended footprint in still air.
ELECTRICAL SPECIFICATIONS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Static
(Note 4)
CONDITIONS
V
GS
= 0V, I
D
= 250µA
V
DS
= V
GS
, I
D
= 250µA
V
GS
= ±30V, V
DS
= 0V
V
DS
= 800V, V
GS
= 0V
V
GS
= 10V, I
D
= 2.75A
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
R
DS(on)
Q
g
MIN
800
2
--
--
--
TYP
--
--
--
--
0.9
MAX
--
4
±100
1
1.2
UNIT
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Dynamic
(Note 5)
V
V
nA
µA
Ω
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Gate Resistance
Switching
(Note 6)
--
--
--
--
--
--
19.4
3.4
9.6
685
62
3.4
--
--
--
--
--
--
pF
Ω
nC
V
DS
= 380V, I
D
= 5.5A,
V
GS
= 10V
V
DS
= 100V, V
GS
= 0V,
f = 1.0MHz
F = 1MHz, open drain
Q
gs
Q
gd
C
iss
C
oss
R
g
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Source-Drain Diode
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Notes:
1.
2.
3.
4.
5.
6.
Current limited by package.
Pulse width limited by the maximum junction temperature.
L = 50mH, I
AS
= 2.2A, V
DD
= 50V, R
G
= 25Ω, Starting T
J
= 25 C
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%.
For DESIGN AID ONLY, not subject to production testing.
Switching time is essentially independent of operating temperature.
o
t
d(on)
V
DD
= 380V,
R
GEN
= 25Ω,
I
D
= 5.5A, V
GS
= 10V,
(Note 4)
--
--
--
--
22
11
55
10
--
--
--
--
ns
t
r
t
d(off)
t
f
I
S
= 5.5A, V
GS
= 0V
V
R
= 100V, I
S
= 5.5A
dI
F
/dt = 100A/μs
V
SD
t
rr
Q
rr
--
--
--
--
240
2.5
1.4
--
--
V
ns
μC
Document Number:DS_P0000176
2
Version: B1706
TSM80N1R2
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
TSM80N1R2CH C5G
TSM80N1R2CP ROG
PACKAGE
TO-251 (IPAK)
TO-252 (DPAK)
PACKING
75pcs / Tube
2,500pcs / 13” Reel
Document Number:DS_P0000176
3
Version: B1706
TSM80N1R2
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Output Characteristics
I
D
, Continuous Drain Current (A)
I
D
, Continuous Drain Current (A)
Transfer Characteristics
V
DS
, Drain to Source Voltage (V)
On-Resistance vs. Drain Current
R
DS(on)
, Drain-Source On-Resistance
(Normalized)
V
GS
, Gate to Source Voltage (V)
V
GS
, Gate to Source Voltage (V)
Gate-Source Voltage vs. Gate Charge
I
D
, Continuous Drain Current (A)
Q
g
, Gate Charge (nC)
On-Resistance vs. Junction Temperature
R
DS(on)
, Drain-Source On-Resistance
(Normalized)
Source-Drain Diode Forward Current vs. Voltage
I
S
, Body Diode Forward Current (A)
T
J
, Junction Temperature (°C)
V
SD
, Body Diode Forward Voltage (V)
Document Number:DS_P0000176
4
Version: B1706
TSM80N1R2
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Capacitance vs. Drain-Source Voltage
BV
DSS
(Normalized)
Drain-Source Breakdown Voltage (V)
BV
DSS
vs. Junction Temperature
C, Capacitance (pF)
V
DS
, Drain to Source Voltage (V) us
Drain Current (A)
Maximum Safe Operating Area
I
D
, Continuous Drain Current (A)
T
J
, Junction Temperature (°C)
V
DS
, Drain to Source Voltage (V)
Continuous Drain Current (A)
Normalized Thermal Transient Impedance, Junction-to-Case
Normalized Effective Transient
Thermal Impedance
10
1
10
0
Duty=0.5
Duty=0.2
Duty=0.1
Duty=0.05
Duty=0.02
Duty=0.01
Single pulse
10
-1
10
-2
10
-3
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
Square Wave Pulse Duration (s)
Document Number:DS_P0000176
5
Version: B1706
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