card insertion into a live backplane without corruption of
the data and clock busses. When a connection is made,
the LTC4303 provides bidirectional buffering, keeping the
backplane and card capacitances isolated. If SDAOUT or
SCLOUT is low for ≥ 30ms (typ), the LTC4303 automatically
breaks the data and clock bus connection. At this time the
LTC4303 automatically generates up to 16 clock pulses on
SCLOUT in an attempt to free the bus. A connection will
be enabled automatically when the bus becomes free.
Rise-time accelerator circuitry allows the use of larger pull-
up resistance while still meeting rise-time requirements.
During insertion, the SDA and SCL lines are precharged
to 1V to minimize bus disturbances. When driven high,
ENABLE allows the LTC4303 to connect after a stop bit or
bus idle occurs. Driving ENABLE low breaks the connection
between SDAIN and SDAOUT, SCLIN and SCLOUT. READY
is an open drain output that indicates when the backplane
and card sides are connected together.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6356140, 6650174, 7032051.
■
■
■
■
■
■
■
■
■
■
Automatic Disconnect of SDA/SCL Lines when Bus
is Stuck Low for ≥ 30ms
Recovers Stuck Busses with Automatic Clocking*
Bidirectional Buffer* for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
Pin Compatible with LTC4300A-1
±15kV Human Body Model ESD Protection
Isolates Input SDA and SCL Lines from Output
Compatible with I
2
C
TM
, I
2
C Fast-Mode and SMBus
Standards (Up to 400kHz Operation)
READY Open Drain Output
1V Precharge on All SDA and SCL Lines
High Impedance SDA, SCL Pins for V
CC
= 0V
ENABLE Gates Connection from Input to Output
MSOP 8-Pin and DFN (3mm
×
3mm) Packages
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
RAID Systems
APPLICATIO S
■
■
■
■
TYPICAL APPLICATIO
5V 3.3V
10k
BACK_SCL
10k
0.01
m
F
10k
V
CC
LTC4303
SCLIN
SCLOUT
CARD_SCL
SDAOUT
5V/DIV
10k
SDAIN
BACK_SDA
SDAOUT
CARD_SDA
SDAIN
5V/DIV
AUTOMATIC CLOCKING
3.3V
100k
ENABLE
GND
READY
4303
TA01
SCLOUT
5V/DIV
4303 TA01b
BACKPLANE
CONNECTOR
STAGGERED
CONNECTOR
CARD
U
U
U
Stuck Bus Resolved
with Automatic Clocking
STUCK LOW > 30ms
RECOVERS
DISCONNECT AT TIMEOUT
200
m
s/DIV
4303fb
1
LTC4303
ABSOLUTE
AXI U RATI GS
V
CC
to GND .................................................. –0.3V to 7V
SDAIN, SCLIN, SDAOUT, SCLOUT,
READY, ENABLE ........................................... –0.3V to 7V
Operating Temperature
LTC4303C ................................................ 0°C to 70°C
LTC4303I .............................................–40°C to 85°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
ENABLE 1
SCLOUT 2
SCLIN 3
GND 4
9
8
7
6
5
V
CC
SDAOUT
SDAIN
READY
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 9)
PCB CONNECTION OPTIONAL
ORDER PART NUMBER
LTC4303CDD
LTC4303IDD
DD PART MARKING*
LBPZ
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL
Power Supply
V
CC
I
CC
Startup Circuitry
V
PRE
T
IDLE
V
OL_READY
V
THR_ENABLE
I
ENABLE
V
THR
PARAMETER
Positive Supply Voltage
Supply Current
Supply Current, ENABLE = GND
Precharge Voltage
Bus Idle Time
READY Output Low Voltage
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, unless otherwise noted.
CONDITIONS
●
V
CC
= 5.5V, V
SDAIN
= V
SDAOUT
= 0V (Note 7)
V
CC
= 5.5V
SDA, SCL Floating, V
CC
= 5.5V
I
PULLUP
= 3mA
I
PULLUP
= 6mA, V
CC
= 4.7V
ENABLE Threshold
ENABLE Input Current
ENABLE from 0 to V
CC
SDA, SCL Logic Input Threshold Voltage Rising Edge
单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
