MXO45 & MXO45HS
HCMOS/TTL Clock Oscillator
•
•
•
•
•
•
•
•
•
•
FEATURES
Standard 14 Pin or 8 Pin DIP Packages
HCMOS/TTL Compatible Output
Fundamental and 3
rd
Overtone Crystal Designs
Frequency Range 1 – 200 MHz
Frequency Stability ±50 ppm Standard
Operating Voltage +5.0Vdc
Operating Temperature to -40°C to +85°C
Output Enable Standard
Plastic Tray Packaging
RoHS/Green Compliant (6/6)
APPLICATIONS
Applications for MXO45 and MXO45HS include microprocessors/DSP/FPGA,
networking equipment, broadband access, storage area networks, computers and peripherals,
test and measurement, Ethernet/Gigabit Ethernet.
ORDERING INFORMATION
MXO
SUPPLY VOLTAGE
45 = 14 Pin DIP/STD Output
45T = 14 Pin DIP/Tristate Output
45HS = 8 Pin DIP/STD Output
45HST = 8 Pin DIP/Tristate Output
FREQUENCY STABILITY
6
5
3
2
=
=
=
=
±
±
±
±
20 ppm
1
25 ppm
50 ppm [standard]
100 ppm
-
-
M
FREQUENCY IN MHz
M - indicates MHz and decimal point.
2
OPERATING TEMPERATURE RANGE
C = -20°C to +70°C [standard]
I = -40°C to +85°C
1
1] 6I Stability/Temperature combination is not available. Check availability for 6C combination.
2] Frequency is recorded with only leading significant digits before the ‘M’ and 4 - 6 significant digits after the ‘M’ (including zeros).
[Ex. XMXXXXXX (3M579545), XXMXXXXX (14M31818), XXXMXXXX (125M0000)]
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
PACKAGING INFORMATION
[reference]
Product is packaged in plastic trays. Typical packaging format is as follows:
50 pcs./Plastic Tray.
Tray size is approximately 180 x 136 x 18mm [LxWxH].
2 Trays per Anti-Static Bag [100 pcs.] or 10 Trays per Anti-Static Bag [500 pcs.].
Bag height for 10 Trays is approximately 175mm.
1 anti-static bag per cardboard carton.
Master-pack multiple cardboard cartons in a larger carton.
8 cardboard cartons [10 trays per carton] is approximately 460 x 380 x 400mm [LxWxH].
Document No. 008-0258-0
Page 1- 3
Rev. F
www.ctscorp.com
MXO45 & MXO45HS
Metal DIP Low Cost
HCMOS/TTL Clock Oscillator
ELECTRICAL CHARACTERISTICS
PARAMETER
Maximum Supply Voltage
Storage Temperature
Frequency Range
Frequency Stability
Aging
Operating Temperature
Commercial
Industrial
Supply Voltage
Supply Current
SYMBOL
V
CC
T
STG
f
O
Δf/f
O
Δf
T
A
V
CC
±10%
Frequency Range
Tested load condition noted for typical values.
CONDITIONS
-
-
-
See Note 1 and Ordering Information
First year
-
MIN
-0.5
-40
1.0
-
-
-20
-40
4.5
C
L
=50pF
C
L
=30pF
C
L
=30pF
C
L
=15pF
C
L
=15pF
-
-
-
-
-
-
-
-
-
90%V
CC
2.4
-
TYP
-
-
-
-
3
+25
5.0
10
20
30
40
55
-
-
-
-
-
-
-
-
-
MAX
+7.0
+100
200
20,25,50 or 100
5
+70
+85
5.5
26
40
60
70
80
50
30
15
10
-
10%V
CC
0.4
-16
16
55
UNIT
V
°C
MHz
± ppm
± ppm
°C
V
I
CC
1.0MHz to 20MHz
20.001MHz to 40MHz
40.001MHz to 80MHz
80.001MHz to 125MHz
125.001MHz to 200MHz
1.0MHz to 50MHz
50.001MHz to 80MHz
80.001MHz to 200MHz
1.0MHz to 200MHz
CMOS Load
10 TTL LOAD
CMOS
TTL Load
V
OH
= 3.9V
V
OL
= 0.4V
@ 50% Level
@ 10% - 90% Levels
V
CC
= 4.5V
V
CC
= 4.5V
mA
Output Load
CMOS
ELECTRICAL PARAMETERS
C
L
TTL
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Output Current
Logic '1' Level
Logic '0' Level
Output Duty Cycle
Rise and Fall Time
I
OH
I
OL
SYM
-
-
45
C
L
=50pF
C
L
=30pF
C
L
=15pF
C
L
=15pF
mA
%
V
OH
V
OL
pF
TTL
V
Tested load condition noted for typical values.
T
R
, T
F
Start Up Time
Enable Function
Enable Input Voltage
Disable Input Voltage
Enable Time
Standby Current
Period Jitter, Pk-Pk
Period Jitter, RMS
T
S
V
IH
V
IL
T
PLZ
I
ST
-
-
1.0MHz to 20MHz
20.001MHz to 80MHz
80.001MHz to 125MHz
125.001MHz to 200MHz
Application of V
CC
Pin 1 Logic '1', Output Enabled
Pin 1 Logic '0', Output Disabled
Pin 1 Logic '1'
Pin 1 Logic '0', Output Disabled
-
-
-
-
-
-
-
2.0
-
-
-
-
-
8
5
2.5
-
-
-
-
-
-
-
-
10
8
5
2
10
-
0.8
200
10
50
5
1
ns
ms
V
ns
µA
ps
Bandwidth 12kHz - 20MHz
Phase Jitter, RMS
-
-
-
Notes:
1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.
Document No. 008-0258-0
Page 2 - 3
Rev. F
MXO45 & MXO45HS
Metal DIP Low Cost
HCMOS/TTL Clock Oscillator
ELECTRICAL CHARACTERISTICS
LVCMOS OUTPUT WAVEFORM
TEST CIRCUIT, CMOS LOAD
ENABLE TRUTH TABLE
PIN 1
Logic ‘1’
Open
Logic ‘0’
PIN 5 or PIN 8
Output
Output
High Imp.
D.U.T. PIN ASSIGNMENTS
PIN
SYMBOL
1
7 or 4
8 or 5
14 or 8
EOH
GND
Output
V
CC
DESCRIPTION
Enable Input or No Connect
Circuit & Package Ground
RF Output
Supply Voltage
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
DIP-14
MARKING INFORMATION
1. Model Name:
DIP-14 – MXO45 or MXO45T.
DIP-8 – MXO45HS or MXO45HST.
2. XXXMXXXXXX – Frequency is marked with only
leading significant digits before the ‘M’ and
4 – 6 digits after the ‘M’ (including zeros).
Ex. XMXXXXXX [3M579545]
XXMXXXXX [14M31818]
XXXMXXXX [125M0000]
3. ST – Frequency stability/temperature code.
4. YYWW – Date code, YY – year, WW – week.
5. ** – Manufacturing Site Code.
NOTES
1. Lead finish [e1], SnAgCu.
2. Reflow conditions per JEDEC J-STD-020,
260°C maximum.
3. Moisture Sensitivity Level 1, per JEDEC J-STD-
020.
[Refer to Ordering Information.]
MXO45
XXXMXXXXXX
CTS ST
●
YYWW **
DIP-8
MXO45HS
XXXMXXXXXX
CTS ST
●
YYWW **
Document No. 008-0258-0
Page 3 - 3
Rev. F
FPGA/CPLD
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