AR0220
1/1.8-Inch CMOS Digital
Image Sensor
General Descriptio
n
ON Semiconductor AR0220AT is a 1/1.8−inch CMOS digital image
sensor with a 1828 H x 948 V active−pixel array. This advanced
automotive sensor captures images in either linear, or high dynamic
range, with rolling−shutter readout. AR0220AT is optimized for both
low light and challenging high dynamic range scene performance,
with a 4.2
mm
BSI pixel and on−sensor 120 dB HDR capture
capability. The sensor includes flexible functions such as in−pixel
binning, windowing, and both video and single frame modes. The
sophisticated sensor fault detection features and embedded data on
AR0220AT are designed to enable camera ASIL B compliance. The
device is programmable through a simple two−wire serial interface,
and supports MIPI output interface.
Table 1. KEY PARAMETERS
Parameter
Optical format
Active pixels
Pixel size
Color filter array
Shutter type
Input clock range
Output clock maximum
Output
Frame rate
Responsivity*
Serial
Full resolution
RCCC (Clear)
RGB (Green)
RCCB (Clear)
SNR
MAX
Maximum dynamic range
Supply voltage
I/O
Digital
Analog
MIPI
Power consumption (typical)
Typical Value
1/1.8 inch (8.93 mm)
1820 x 940 = 1.7M
4.2
mm
RGB Bayer, RCCC, RCCB
Electronic rolling shutter
6
−
50 MHz
85.5 MHz
MIPI CSI−2 12−, 14−, 16−, or 20−bit
60 fps at 3−exposure HDR
36 fps at 4−exposure HDR
135 ke−/lux*sec
60.5 ke−/lux*sec
135 ke−/lux*sec
44.7 dB
> 120 dB
1.8 or 2.8 V
1.2 V
2.8 V
1.2 V
424 mW (Full resolution 60 fps MIPI
4 lane output 3−exp HDR mode)
269 mW (Full resolution 60 fps MIPI
4 lane output Linear mode)
−40°C
to +105°C (ambient)
−40°C
to +125°C (junction)
12 x 9 mm iBGA
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Features
•
High Performance 4.2
mm
Automotive
•
•
•
•
•
•
•
•
•
•
•
•
•
Grade Backside Illuminated (BSI) Pixel
with DR−Pixt Technology
Advanced On−Sensor HDR Reconstruct
with Flexible Exposure Ratio Control
Full Resolution Video Capture at 60fps in
3−exposure HDR and 36fps in 4−exposure
HDR
Fast Single Exposure Video Capture at
100fps in 10−bit and 85fps in 12−bit output
Line interleaved T1/T2/T3/T4 output
Sensor Fault Detection for ASIL−B Com-
pliance Support
2x2 In−pixel Binning Mode and Color Bin-
ning Mode
Data Interfaces: 4−lane MIPI CSI−2
Selectable Automatic or User Controlled
Black Level Control
Frame to Frame Switching Among up to 4
Contexts to Enable Multi−function Systems
Spread−spectrum Input Clock Support
Multi−Camera Synchronization Support
Multiple CFA Options including RGB, and
RCCC, RCCB
These are Pb−Free Devices
Operating temperature
Package options
*D65, 670 nm IRCF
This document, and the information contained herein,
is CONFIDENTIAL AND PROPRIETARY and the
property of Semiconductor Components Industries,
LLC., dba ON Semiconductor. It shall not be used,
published, disclosed or disseminated outside of the
Company, in whole or in part, without the written
permission of ON Semiconductor. Reverse
engineering of any or all of the information contained
herein is strictly prohibited.
E
2018, SCILLC. All Rights Reserved.
©
Semiconductor Components Industries, LLC, 2016
June, 2018
−
Rev. 2
1
Publication Order Number:
AR0220/D
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
AR0220
•
Electronic Mirror Replacement
•
ADAS + Viewing Fusion
•
High Dynamic Range Imaging
Applications
•
1.7 MP, High Performance ADAS (Automotive Driver
Assistant System)
•
Automotive Rear View or Backup
•
Automotive Surround View
ORDERING INFORMATION
Part number
AR0220AT3R00XUEA0−DPBR
AR0220AT3R00XUEA0−DRBR
AR0220AT3R00XUD20
AR0220AT3R00XUEAH3−GEVB
MARS1−AR0220AT3R−GEVB
AR0220AT3R00XUEA0−VL−TPBR
AR0220AT3R00XUEA0−VL−DPBR
AR0220AT3C00XUEA0−DPBR
AR0220AT3C00XUEA0−DRBR
AR0220AT3C00XUD20
AR0220AT3C00XUEAH3−GEVB
MARS1−AR0220AT3−GEVB
AR0220AT3B00XUEA0−DRBR
AR0220AT3B00XUEA0−DPBR
AR0220AT3B00XUD20
AR0220AT3B00XUEAH3−GEVB
Description
RCCC, 0°CRA, iBGA
RCCC, 0°CRA, iBGA
RCCC, 0°CRA
RCCC, 0°CRA
RCCC, 0°CRA
RCCC, 0°CRA, iBGA
RCCC, 0°CRA, iBGA
RGB, 0°CRA, iBGA
RGB, 0°CRA, iBGA
RGB, 0°CRA
RGB, 0°CRA
RGB, 0°CRA
RCCB, 0°CRA, iBGA
RCCB, 0°CRA, iBGA
RCCB, 0°CRA
RCCB, 0°CRA
Orderable Product Attribute Description
Dry Pack with Protective Film, Double Side BBAR Glass
Dry Pack without Protective Film, Double Side BBAR
Glass
Recon/Die
Demo3 Headboard
MARS Sensor Board
Tape & Reel with corner tab Protective Film, Double Side
BBAR Glass
Dry Pack with corner tab Protective Film, Double Side
BBAR Glass
Dry Pack with Protective Film, Double Side BBAR Glass
Dry Pack without Protective Film, Double Side BBAR
Glass
Recon/Die
Demo3 Headboard
MARS Sensor Board
Dry Pack without Protective Film, Double Side BBAR
Glass
Dry Pack with Protective Film, Double Side BBAR Glass
Recon/Die
Demo3 Headboard
Package
iBGA87
(Pb−free)
NOTE: Contact the ON Semiconductor sales or marketing representative to discuss your specific requirements.
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2
AR0220
General Description
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
The ON Semiconductor AR0220AT can be operated in its
default mode or programmed for frame size, exposure, gain,
and other parameters. The default mode output is a 1820 x
940 resolution image at 60 frames per second (fps). In linear
mode, it outputs 12−bit raw data, using serial MIPI output
ports. In high dynamic range mode, it outputs 12−bit, 14−bit
or 16−bit compressed or 20−bit linearized data using the
MIPI port. The device may be operated in video (master)
mode or in single frame trigger mode.
FRAME_VALID, LINE_VALID and pixel clock can be
programmed to output by GPIO pins in serial mode.
The AR0220AT includes additional features to allow
application−specific tuning: windowing and offset, auto
black level correction, and on−board temperature sensor.
Optional register information and histogram statistic
information can be embedded in first and last two lines of the
image frame.
The sensor is designed to operate in a wide temperature
range (−40°C to +125°C junction).
Functional Overview
The AR0220AT is a progressive−scan sensor that
generates a stream of pixel data at a constant frame rate. It
uses an on−chip, phase−locked loop (PLL) that can be
optionally enabled to generate all internal clocks from a
single master input clock running between 6 and 50 MHz.
The maximum output pixel rate is 85.5 Mp/s. Figure 1 shows
a block diagram of the sensor.
OTPM
Active Pixel Sensor
(APS)
Array
Power
Memory
PLL
External
Clock
Timing and Control
(Sequencer)
Stats Engine
Serial
Output
Analog Processing and
A/D Conversion
Trigger
Pixel Data Path
(Signal Processing)
Two−Wire
Serial Interface
Control Registers
Figure 1. Block Diagram
User interaction with the sensor is through the two−wire
serial bus, which communicates with the array control,
analog signal chain, and digital signal chain. The core of the
sensor is a 1.7 Mp BSI Active−Pixel Sensor array. The
timing and control circuitry sequences through the rows of
the array, resetting and then reading each row in turn. In the
time interval between resetting a row and reading that row,
the pixels in the row integrate incident light. The exposure
is controlled by varying the time interval between reset and
readout. Once a row has been read, the data from the
columns is sequenced through an analog signal chain
(providing offset correction and gain), and then through an
analog−to−digital converter (ADC). The output from the
ADC is a 12−bit value for each pixel in the array. The ADC
output passes through a digital processing signal chain
(which provides further data path corrections and applies
digital gain). The sensor also offers a high dynamic range
mode of operation where multiple images are combined
onchip to produce a single image at 20−bit per pixel value.
A compressing mode is further offered to allow this 20−bit
pixel value to be transmitted to the host system as a 12− or
14− or 16−bit value with close to zero loss in image quality.
The pixel data are output at a rate of up to 85.5 Mp/s.
Features Overview
The AR0220AT has a wide array of features to enhance
functionality and to increase versatility. A summary of
features follows. Please refer to the AR0220AT Developer
Guide for detailed feature descriptions, register settings, and
tuning guidelines and recommendations.
•
Operating Modes
The AR0220AT works in master (video), trigger (single
frame), or Auto Trigger modes. In master mode, the
sensor generates the integration and readout timing. In
trigger mode, it accepts an external trigger to start
exposure, then generates the exposure and readout
timing. The exposure time is programmed through the
two−wire serial interface for both modes.
•
Window Control
Configurable window size and blanking times allow a
wide range of resolutions and frame rates. Digital
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CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
AR0220
•
Reset
•
•
•
•
•
•
The AR0220AT may be reset by a register write, or by
a dedicated input pin.
Output Enable
The AR0220AT output pins may be tri−stated using
dedicated register bits.
Temperature Sensor
Black Level Correction
Row Noise Correction
Digital Correlated Double Sampling (CDS)
Test Patterns
Several test patterns may be enabled for debug
purposes. These include a solid color, color bar, fade to
gray, and a walking 1s test pattern.
•
•
•
•
binning and skipping modes are supported, as are
vertical and horizontal mirror operations.
Context Switching
Context switching may be used to rapidly switch
between two sets of register values. Refer to the
AR0220AT Developer Guide for a complete set of
context switchable registers.
Gain
The AR0220AT can be configured for analog gain of
up to 4x, and digital gain of up to 8x.
MIPI
The AR0220 image sensor supports 4−line MIPI CSI−2
D−PHY
PLL
An on chip PLL provides reference clock flexibility and
supports spread spectrum sources for improved EMI
performance.
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4
AR0220
PIXEL DATA FORMAT
Pixel Array Structure
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
The AR0220AT pixel array is configured as 1828 columns
by 948 rows (see Figure 2). The dark pixels are optically
black and are used internally to monitor black level. There
are 1828 columns by 948 rows of optically active pixels.
While the sensor’s format is 1820 x 940, the additional
active columns and active rows are included for use when
horizontal or vertical mirrored readout is enabled, to allow
1864
readout to start on the same pixel. The pixel adjustment is
always performed for RCCC, RCCB or color versions. The
active area is surrounded with optically transparent dummy
pixels to improve image uniformity within the active area.
Not all dummy pixels or barrier pixels can be read out. The
optical center of the readable active pixels can be found
between X_ADDR 913 and 914, and between Y_ADDR
473 and 474.
4 light dummy +
4 barrier +
14 dark +
8 barrier
996
4 light dummy +
12 barrier +
24 dark +
2 barrier
Imaging Array 1828 x 948 (readable active pixel)
7.68 x 3.98 mm
2
4 light dummy +
2 barrier
4 light dummy +
2 barrier
Dark
pixel
Barrier
pixel
Light
dummy
pixel
Readable
Active
pixel
Figure 2. Pixel Array Description
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