Si5395/94/92 Data Sheet
12-Channel, Any-Frequency, Any-Output Jitter Attenuator/
Clock Multiplier with Ultra-Low Jitter
The Si5395/94/92 Jitter attenuators combine fourth-generation DSPLL™ and Multi-
Synth™ technologies to deliver ultra-low jitter (69 fs) for high performance applica-
tions like 56G SerDes. They are used in applications that demand the highest level
of integration and jitter performance. All PLL components are integrated on-chip,
eliminating the risk of noise coupling associated with discrete solutions. These devi-
ces support free-run, synchronous, and holdover modes of operation and offer both
automatic and manual input clock switching.
The Si5395/94/92 support free-run, synchronous and holdover modes as well as en-
hanced hitless switching , minimizing the phase transients associated when switch-
ing between input clocks. These devices are programmable via a serial interface
with in-circuit programmable non-volatile memory (NVM) so they always power up
with a known frequency configuration. Programming the Si5395/94/92 is easy with
Silicon Labs’
ClockBuilder Pro
™
software. Factory preprogrammed devices are also
available.
Applications:
• 56G/112G PAM4 SerDes clocking
• OTN muxponders and transponders
• 10/40/100/200/400G networking line cards
• 10/40/100/400 GbE Synchronous Ethernet (ITU-T G.8262)
• Medical imaging
• Test and measurement
KEY FEATURES
• Generates any combination of output
frequencies from any input frequency
• Ultra low phase jitter:
• 69 fs RMS (Grade P)
• 85 fs RMS (integer mode)
• 100 fs RMS (fractional mode)
• Enhanced hitless switching minimizes output
phase transients (0.2 ns typ)
• Input frequency range
• Differential: 8 kHz to 750 MHz
• LVCMOS: 8 kHz to 250 MHz
• Output frequency range
• Differential: 100 Hz to 1028 MHz
• LVCMOS: 100 Hz to 250 MHz
• Meets G.8262 EEC Option 1, 2 (SyncE)
• Status monitoring
• Option for integrated reference
• Si5395: 4 input, 12 output
• Si5394: 4 input, 4 output
• Si5392: 4 input, 2 output
• Drop-in compatible with Si5345/44/42
Integrated
Reference*
IN0
4 Input
Clocks
IN1
IN2
÷FRAC
÷FRAC
÷FRAC
÷FRAC
÷INT
MultiSynth
MultiSynth
MultiSynth
DSPLL
MultiSynth
MultiSynth
÷INT
÷INT
÷INT
÷INT
÷INT
÷INT
÷INT
÷INT
OUT0A
Si5392
Si5394
Up to 12
Output Clocks
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
Si5395
OUT8
OUT9
OUT9A
IN3/FB_IN
Status Flags
I
2
C/SPI
Status Monitor
Control
NVM
÷INT
÷INT
÷INT
*Future product (J/K/L/M). Si539x A/B/C/D/P grades have external reference (XTAL or XO)
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Preliminary Rev. 0.96
Si5395/94/92 Data Sheet
Features List
1. Features List
The Si5395/94/92 features are listed below:
• Generates any output frequency in any format from any input
frequency
• Integrated reference (J/K/L/M) - Future Product
• Ultra-low phase jitter of 69 fs (P-Grade)
• Dynamic phase adjust
• Input frequency range
• Differential: 8 kHz–750 MHz
• LVCMOS: 8 kHz–250 MHz
• Output frequency range
• Differential: 100 Hz to 1028 MHz
• LVCMOS: 100 Hz to 250 MHz
• Programmable jitter attenuation bandwidth: 0.1 Hz to 4 kHz
• Meets G.8262 EEC Option 1, 2 (SyncE)
• Highly configurable outputs compatible with LVDS, LVPECL,
LVCMOS, CML, and HCSL with programmable signal ampli-
tude
• Status monitoring (LOS, OOF, LOL)
• Enhanced hitless switching for 8 kHz, 19.44 MHz, 25 MHz in-
puts and other frequencies
• Locks to gapped clock inputs
• Free-run and holdover modes
• Drop-in compatible with Si5345/44/42
•
•
•
•
•
Optional zero delay mode
Fast-lock acquisition for low nominal bandwidths
Independent Frequency-on-the fly for each MultiSynth
DCO mode: as low as 0.001 ppb step size
Core voltage
• V
DD
: 1.8 V ±5%
• V
DDA
: 3.3 V ±5%
• Independent output clock supply pins
• 3.3 V, 2.5 V, or 1.8 V
• Serial interface: I
2
C or SPI
•
•
•
•
•
•
•
In-circuit programmable with non-volatile OTP memory
ClockBuilder Pro software simplifies device configuration
Si5395: 4 input, 12 output, 64-QFN 9×9 mm
Si5394: 4 input, 4 output, 44-QFN 7×7 mm
Si5392: 4 input, 2 output, 44-QFN 7×7 mm
Temperature range: –40 to +85 °C
Pb-free, RoHS-6 compliant
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Preliminary Rev. 0.96 | 2
Si5395/94/92 Data Sheet
Related Documents
2. Related Documents
Table 2.1. Related Documentation and Software
Document/Resource
Description/URL
https://www.silabs.com/documents/login/reference-manuals/
si5395-94-92-family.pdf
The reference manual is intended to be used in conjunction with
this data sheet, which contains more detailed explanations about
the operation of the device.
https://www.silabs.com/documents/public/reference-manuals/
si534x-8x-9x-recommended-crystals-rm.pdf
https://www.silabs.com/documents/public/user-guides/ug334-
si5394evb.pdf
https://www.silabs.com/documents/public/user-guides/ug335-
si5395evb.pdf
https://www.silabs.com/documents/public/application-notes/
an1151-using-si539x.pdf
https://www.silabs.com/documents/public/application-notes/
an1155-differences-between-si5342-47-and-si5392-97.pdf
http://www.silabs.com/Si5395-94-92-FAQ
http://www.silabs.com/quality
https://www.silabs.com/products/development-tools/timing/
clock#highperformance
https://www.silabs.com/products/development-tools/software/
clockbuilder-pro-software
Si5395/94/92 Family Reference Manual
Crystal Reference Manual
UG334: Si5394-EVB User's Guide
UG335: Si5395-EVB User's Guide
AN1151: Using the Si539x in 56G SerDes Applications
AN1155: Differences between Si5342-47 and Si5392-97
Frequently Asked Questions
Quality and Reliability
Development Kits
ClockBuilder Pro (CBPro) Software
silabs.com
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Preliminary Rev. 0.96 | 3
Si5395/94/92 Data Sheet
Ordering Guide
3. Ordering Guide
Table 3.1. Si5395/94/92 Ordering Guide
Ordering Part
Number (OPN)
Si5395
Si5395A-A-GM
1, 2
Si5395B-A-GM
1, 2
Si5395C-A-GM
1, 2
Si5395D-A-GM
1, 2
Si5395P-A-GM
1, 2
Si5394
Si5394A-A-GM
1, 2
Si5394B-A-GM
1, 2
Si5394C-A-GM
1, 2
Si5394D-A-GM
1, 2
Si5394P-A-GM
1, 2
Si5392
Si5392A-A-GM
1, 2
Si5392B-A-GM
1, 2
Si5392C-A-GM
1, 2
Si5392D-A-GM
1, 2
Si5392P-A-GM
1, 2
Si5395/94/92 Evaluation Board
Si5395A-A-EVB
12-output
Any-frequency, any Output
—
64-QFN
Evaluation
Board
64-QFN
Evaluation
Board
44-QFN
Evaluation
Board
44-QFN
Evaluation
Board
—
4/2
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001to 350 MHz
312.5/156.25 MHz
Integer and Fractional
44-QFN
7×7 mm
External
4/4
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001 to 350 MHz
312.5/156.25/100/50/25 MHz
Integer and Fractional
44-QFN
7×7 mm
External
4/12
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001 to 350 MHz
312.5/156.25/100/50/25 MHz
Integer and Fractional
64-QFN
9×9 mm
External
Number of Input/
Output Clocks
Output Clock
Frequency Range (MHz)
Supported Frequency
Synthesis Modes
Package
Reference
Integer Only
Precision Calibration
Integer Only
Precision Calibration
Integer Only
Precision Calibration
Si5395P-A-EVB
12-output
Low jitter clocks for 56G PAM4
SerDes
—
—
Si5394A-A-EVB
4-output
Any-frequency, any Output
—
—
Si5394P-A-EVB
4-output
Low jitter clocks for 56G PAM4
SerDes
—
—
Notes:
1. Add an R at the end of the OPN to denote tape and reel ordering options.
2. Custom, factory preprogrammed devices are available. Ordering part numbers are assigned by Silicon Labs and the ClockBuilder
Pro software utility. Custom part number format is “Si5395A-Axxxxx-GM” where “xxxxx” is a unique numerical sequence repre-
senting the preprogrammed configuration.
silabs.com
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Preliminary Rev. 0.96 | 4
Si5395/94/92 Data Sheet
Ordering Guide
Figure 3.1. Ordering Part Number Fields
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Preliminary Rev. 0.96 | 5
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