Data Sheet
RAA207703GBM/7704GBM/7705GBM
Synchronous Buck Regulator with
Internal Power MOSFETs
Description
The RAA207703GBM is monolithic synchronous buck regulator with power MOSFETs in extremely small package.
The RAA207703GBM delivers high output current by small Rds(on) Power MOSFETs. Constant on time control
architecture provides fast transient response, and minimize external components. The RAA207703GBM operates skip
mode at light load, it provides high efficiency in all load condition. The RAA207703GBM incorporates internal 5V
LDO, so the regulator can operates single power supply. Three current ability products can be selected.
R07DS0892EJ0100
Rev.1.00
Aug 02, 2013
Features
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Input voltage range: 5.5 V to 16 V (internal LDO use), 3.0 V to 16 V (external 5 V use)
Output voltage range: 0.8 V to 5.0 V
Constant-On-Time control
Built-in power MOSFETs suitable for PC, Server application
Internal 5 V LDO for single power supply operation
5 V LDO / external 5 V input selectable (LDO remote ON/OFF)
Switching frequency: Adjustable up to 2 MHz
High average output current, up to 15 A (7703GBM), 10 A (7704GBM), 5 A (7705GBM)
Controllable driver: Remote ON/OFF
Power Good function
Over current protection/Over voltage protection/Thermal shutdown function
Built-in bootstrapping diode
Soft Start period adjustable
Enhanced light load mode function for higher efficiency
Extremely small chip size package with solder bump
Pb-Free/Halogen-Free
Application Circuit
VIN
V5_OUT
ON/OFF
SET
BOOT
VIN
AVIN
SS
RAA207703GBM
RAA207704GBM
SW
RAA207705GBM
PGOOD
FB
LDO_EN#
PGND
SGND
Vout
R07DS0892EJ0100 Rev.1.00
Aug 02, 2013
Page 1 of 23
RAA207703GBM/7704GBM/7705GBM
Pin Arrangement
Top View
<RAA207703GBM>
1
V5_
OUT
<RAA207704GBM>
5
1
A
V5_
OUT
<RAA207705GBM>
5
1
A
V5_
OUT
2
SGND
3
FB
4
LDO_
EN#
2
SGND
3
FB
4
LDO_
EN#
2
SGND
3
FB
4
LDO_
EN#
5
AVIN
AVIN
AVIN
A
BOOT
SET
PGO
OD
SS
ON/
OFF
B
BOOT
SET
PGO
OD
SS
ON/
OFF
B
BOOT
SET
PGO
OD
SS
ON/
OFF
B
SW
VIN
VIN
VIN
VIN
C
SW
VIN
VIN
VIN
VIN
C
SW
SW
VIN
VIN
VIN
C
SW
SW
SW
SW
VIN
D
SW
SW
SW
SW
VIN
D
SW
SW
PGND
PGND
PGND
D
SW
PGND
PGND
PGND
PGND
E
SW
PGND
PGND
PGND
PGND
E
SW
SW
SW
PGND
PGND
F
SW
SW
SW
PGND
PGND
F
SW
PGND
PGND
PGND
PGND
G
Bottom View
<RAA207703GBM>
5
4
LDO_
EN#
<RAA207704GBM>
1
V5_
OUT
<RAA207705GBM>
1
V5_
OUT
3
FB
2
SGND
5
A
4
LDO_
EN#
3
FB
2
SGND
5
A
4
LDO_
EN#
3
FB
2
SGND
1
V5_
OUT
AVIN
AVIN
AVIN
A
ON/
OFF
SS
PGO
OD
SET
BOOT
B
ON/
OFF
SS
PGO
OD
SET
BOOT
B
ON/
OFF
SS
PGO
OD
SET
BOOT
B
VIN
VIN
VIN
VIN
SW
C
VIN
VIN
VIN
VIN
SW
C
VIN
VIN
VIN
SW
SW
C
VIN
SW
SW
SW
SW
D
VIN
SW
SW
SW
SW
D
PGND
PGND
PGND
SW
SW
D
PGND
PGND
PGND
PGND
SW
E
PGND
PGND
PGND
PGND
SW
E
PGND
PGND
SW
SW
SW
F
PGND
PGND
SW
SW
SW
F
PGND
PGND
PGND
PGND
SW
G
CSP 35-pin package
2.67 mm × 3.87 mm
CSP 30-pin package
2.67 mm × 3.37 mm
CSP 20-pin package
2.67 mm × 2.37 mm
R07DS0892EJ0100 Rev.1.00
Aug 02, 2013
Page 2 of 23
RAA207703GBM/7704GBM/7705GBM
Pin Description
Pin Name
V5_OUT
SGND
FB
LDO_EN#
AVIN
BOOT
SET
PGOOD
SS
ON/OFF
VIN
SW
PGND
Note:
Pin No.
1A
2A
3A
4A
5A
1B
2B
3B
4B
5B
—
—
—
Description
Controller voltage
Controller analog GND
Feedback voltage input pin
Internal 5 V LDO enable pin
Analog input voltage
Bootstrap voltage pin
Constant on time program pin
Power good indicator pin
Soft start period program pin
Operation enable pin
Input voltage
Switching node
Power GND
Should be connected to SGND on PCB pattern
Should be connected to VIN on PCB pattern
To be supplied +5 V through integrated SBD
Tie resistor between SW and SET pin
Pull low when No Good (open drain output)
Tie capacitor between SS and SGND
Operation stop when "L" signal asserted
Remarks
Controller supply (5 V regulator output)
Should be connected to PGND on PCB pattern
Pin assign of 1A-5A & 1B-5B is common through RAA207703GBM, RAA207704GBM and RAA207705GBM.
R07DS0892EJ0100 Rev.1.00
Aug 02, 2013
Page 3 of 23
RAA207703GBM/7704GBM/7705GBM
Block Diagram
V5_OUT
Enable
1M
TSD
TSD
1M
UVLO
4.3 V
UVLO
Ripple
Comparator
0.8 V
+
+
–
1.0 V
OVP
Control
Logic
ZCD
Comparator
ZCD
–
+
V5_OUT
OCP
5V LDO
AVIN
VIN
ON/OFF
LDO_EN#
BOOT
SET
2.5
mA
OCP
SS
Enable
UVLO
Fault
1 shot
timer
–
+
SW
FB
0.72 V
–
+
UVLO
Enable
PGOOD
delay
TSD
Fault
Protection
Function
Fault
OVP
PGND
TSD
1. Truth table for the ON/OFF pin
ON/OFF Input
"L"
"Open"
"H"
Driver Chip Status
Shutdown (operation STOP)
Shutdown (operation STOP)
Enable (Normal operation)
OVP
OCP
SGND
2. Truth table for LDO_EN# pin
LDO_EN# Input
"L"
"Open"
"H"
5 V Regulator Status
LDO enable
LDO enable
LDO disable
R07DS0892EJ0100 Rev.1.00
Aug 02, 2013
Page 4 of 23
RAA207703GBM/7704GBM/7705GBM
Absolute Maximum Ratings
(Ta = 25°C)
Item
Input voltage
Switch node voltage
BOOT voltage
Controller voltage
V5_OUT current
FB pin voltage
ON/OFF voltage
LDO_EN# voltage
SET voltage
PGOOD voltage
PGOOD sink current
Operating junction temperature
Storage temperature
Notes: 1.
2.
3.
4.
Symbol
VIN, AVIN
SW
VBOOT
V5_OUT
ICC
V
FB
V
ON/OFF
V
LDO_EN#
V
SET
V
PGOOD
I
PGOOD
Tj-opr
Tstg
Ratings
–0.3 to +20
20(DC), 23(<10 ns)
25(DC), 28(<10 ns)
–0.3 to +6
–20 to +0.1
–0.3 to V5_OUT +0.3
–0.3 to VIN
–0.3 to VIN
–0.3 to VIN
–0.3 to VIN
+2
–40 to +125
–55 to +150
Unit
V
V
V
V
mA
V
V
V
V
V
mA
°C
°C
Notes
1
1
1, 2
1
3
1, 4
1
1
1
1
3
Rated voltages are relative to voltages on the SGND and PGND pins.
BOOT – V5_OUT < 20 V
For rated current, (+) indicates inflow to the chip and (–) indicates outflow.
V5_OUT + 0.3 V < 6 V
Thermal Information
Item
Thermal resistance
(junction to air when device is
mounted on evaluation board)
Note:
Symbol
qj-a
Part No.
RAA207703GBM
RAA207704GBM
RAA207705GBM
Value
27
33
39
Unit
°C/W
Note
1
1. Not assured value, just reference for design. Above data is taken using Renesas's reference board.
Recommended Operating Condition
Item
Input voltage
Analog input voltage
Controller voltage
Continuous output current
Symbol
VIN
AVIN
V5_OUT
IOUT
Ratings
3.0 to 16
4.5 to 16
4.5 to 5.5
0 to 15
0 to 10
0 to 5
Unit
V
V
V
A
Remarks
When V5_OUT is supplied externally
15 A: RAA207703GBM
10 A: RAA207704GBM
5 A: RAA207705GBM
R07DS0892EJ0100 Rev.1.00
Aug 02, 2013
Page 5 of 23
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