TB67S289FTG
Toshiba BiCD process integrated circuit silicon monolithic
TB67S289FTG
Active Gain Control Clock-in control Bipolar stepping motor driver
The TB67S289FTG is a clock-in controlled bipolar stepping
motor driver with a built-in Active Gain Control architecture.
The TB67S289FTG also has an internal current feedback
control (ACDS) which enables the driver to control the motor
current without using a sense resistor.
Using the BiCD process, the TB67S289FTG is rated at 50 V,
3.0 A.
P-VQFN48-0707-0.50-004
Weight 0.14 g (typ.)
Features
•
•
•
•
•
•
•
•
•
Built-in Anti-stall architecture (AGC: Active Gain Control)
Built-in sense resistor less current control architecture (ACDS: Advanced Current Detection System)
Low Rds (on) MOSFET (High side+ Low side=0.4
Ω
(typ.))
Built-in micro stepping control. (Full, Half (a), Half (b), Quarter, 1/8, 1/16, 1/32 step resolution)
Multi error detect functions (Thermal shutdown (TSD), Over current detection (ISD), Power-on-reset
(POR), Motor load open (OPD))
Error detection status output (Error Output)
Internal VCC (5 V) regulator enables the driver to operate with a single power supply (VM).
Adjustable constant current PWM frequency using external components
Small package with thermal pad on back side (QFN48: 7.0 mm x 7.0 mm)
Note: Please consider the heat condition when using the TB67S289FTG.
© 2017
Toshiba Electronic Devices & Storage Corporation
1
2017-09-15
TB67S289FTG
Pin assignment
(Top View)
VREFA
VREFB
OSCM
GND
GND
NC
VCC
VCC
VMB
VMB
VMA
NC
36 35 34 33 32 31 30 29 28 27 26 25
NC
NC
DMODE0
DMODE1
DMODE2
CW/CCW
CLK
ENABLE
RESET
MO
LO1
LO2
37
38
39
40
41
42
43
44
45
46
47
48
1
AGC0
2
AGC1
3
CLIM0
4
CLIM1
5
FLIM
6
BOOST
7
LTH
8
GND
9 10 11 12
NC
VMA
NC
TB67S289FTG
24 OUTB+
23 OUTB+
22 RSBGND
21 RSBGND
20 OUTB-
19 OUTB-
18 OUTA-
17 OUTA-
16 RSAGND
15 RSAGND
14 OUTA+
13 OUTA+
Note: Please solder the corner pad and the rear thermal pad of the QFN package, to the GND pattern of the PCB.
2
NC
2017-09-15
TB67S289FTG
Pin description
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin name
AGC0
AGC1
CLIM0
CLIM1
FLIM
BOOST
LTH
GND
NC
VMA
VMA
NC
OUTA+
OUTA+
RSAGND
RSAGND
OUTA-
OUTA-
OUTB-
OUTB-
RSBGND
RSBGND
OUTB+
OUTB+
NC
VMB
VMB
NC
GND
GND
VREFB
VREFA
VCC
VCC
OSCM
NC
NC
NC
DMODE0
DMODE1
DMODE2
CW/CCW
CLK
ENABLE
RESET
MO
LO1
LO2
Pin function
Active Gain Control setup pin No.0
Active Gain Control setup pin No.1
AGC current limiter setup pin No.0
AGC current limiter setup pin No.1
AGC frequency limiter setup pin
AGC current boost setup pin
AGC threshold setup pin
Ground pin
Non connection
Motor power supply input pin
Motor power supply input pin
Non connection
Ach motor output (+) pin
Ach motor output (+) pin
Ach motor power ground pin
Ach motor power ground pin
Ach motor output (-) pin
Ach motor output (-) pin
Bch motor output (-) pin
Bch motor output (-) pin
Bch motor power ground pin
Bch motor power ground pin
Bch motor output (+) pin
Bch motor output (+) pin
Non connection
Motor power supply input pin
Motor power supply input pin
Non connection
Ground pin
Ground pin
Bch current threshold reference pin
Ach current threshold reference pin
Internal regulator voltage monitor pin
Internal regulator voltage monitor pin
Internal oscillator frequency monitor and setting pin
Non connection
Non connection
Non connection
Step resolution setting pin No.0
Step resolution setting pin No.1
Step resolution setting pin No.2
Current direction setup pin
Step clock input pin
Motor output ON/OFF pin
Electrical angle initialize pin
Electrical angle monitor pin
Error flag output pin No.1
Error flag output pin No.2
Note: Please leave the NC pins open and do not connect any PCB pattern.
Note: For pins with the same pin name; connect the pins together at the nearest point of the driver.
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2017-09-15
TB67S289FTG
Block diagram
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purpose.
Note: All the grounding wires of the TB67S289FTG should run on the solder mask on the PCB and be externally terminated
at only one point. Also, a grounding method should be considered for efficient heat dissipation.
Careful attention should be paid to the layout of the output, VM and GND traces, to avoid short circuits across output pins or
to the power supply or ground. If such a short circuit occurs, the device may be permanently damaged.
Also, the utmost care should be taken for pattern designing and implementation of the device since it has power supply pins
(VM, RS line, OUT line, and GND) through which a particularly large current may run. If these pins are wired incorrectly, an
operation error may occur or the device may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current running
through the IC that is larger than the specified current. Careful attention should be paid to design patterns and mountings.
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2017-09-15
TB67S289FTG
Input-Output equivalent circuit
Pin name
DMODE0
DMODE1
DMODE2
CLK
ENABLE
RESET
CW/CCW
AGC0
AGC1
CLIM0
Input-Output signal
Input-Output equivalent circuit
Logic input pin
Logic input pin voltage
GND ≤ VIN1 (L) ≤ 0.8 V
2.0 V ≤ VIN1 (H) ≤ 5.5 V
GND
100 kΩ
1 kΩ
CLIM1
Multi state input pin voltage
VCC, GND, VCC-100 kΩ pull-up, or
GND-100 kΩ pull-down
(Resistance accuracy should be within
±20 %.)
VCC
100 kΩ
Logic input pin
1 kΩ
100 kΩ
FLIM
BOOST
LTH
100 kΩ pull-down
(Resistance accuracy should be within
±20 %.)
500
Ω
500
Ω
LTH
(10 kΩ to 100 kΩ) VCC
LO1
LO2
MO
Logic output pin
0 V ≤ VOUT (L) ≤ 0.5 V
4.75 V ≤ VOUT (H) ≤ 5.25 V
Logic output pin
VCC
1 kΩ
OSCM frequency range
OSCM
0.64 MHz ≤ fOSCM ≤ 2.4 MHz
OSCM
500
Ω
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2017-09-15
FPGA/CPLD
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