Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
CONTENTS
1
1.1
1.2
1.3
1.4
1.5
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
FEATURES
Video processing
Audio processing
Scaling
Interfacing
General
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
General
PCI interface
Main control
Register Programming Sequencer (RPS)
Status and interrupts
General Purpose Inputs/Outputs (GPIO)
Event counter
Video processing
High Performance Scaler (HPS)
Binary Ratio Scaler (BRS)
Video data formats on the PCI-bus
Scaler register
Scaler event description
Clipping
Data Expansion Bus Interface (DEBI)
Audio interface
I
2
C-bus interface
SAA7146A register tables
14.2
14.3
14.4
14.5
15
16
17
18
8
8.1
8.2
9
10
11
12
13
14
14.1
BOUNDARY SCAN TEST
SAA7146A
Initialization of boundary scan circuit
Device identification codes
LIMITING VALUES
ELECTRICAL OPERATING CONDITIONS
CHARACTERISTICS
APPLICATION EXAMPLE
PACKAGE OUTLINE
SOLDERING
Introduction to soldering surface mount
packages
Reflow soldering
Wave soldering
Manual soldering
Suitability of surface mount IC packages for
wave and reflow soldering methods
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I
2
C COMPONENTS
2004 Aug 25
2
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
1
1.1
FEATURES
Video processing
SAA7146A
•
Full size, full speed video delivery to and from the frame
buffer or virtual system memory enables various
processing possibilities for any external PCI device
•
Full bandwidth PCI-bus master write and read (up to
132 Mbytes/s)
•
Virtual memory support (4 Mbytes per DMA channel)
•
Processing of maximum 4095 active samples per line
and maximum 4095 lines per frame
•
Vanity picture (mirror) for video phone and video
conferencing applications
•
Video flip (upside down picture)
•
Colour space conversion with gamma correction for
different kinds of displays
•
Chroma Key generation and utilization
•
Pixel dithering for low resolution video output formats
•
Brightness, contrast and saturation control
•
Video and Vertical Blanking Interval (VBI) synchronized
programming of internal registers with Register
Programming Sequencer (RPS), ability to control two
asynchronous data streams simultaneously
•
Memory Management Unit (MMU) supports virtual
demand paging memory management (Windows, Unix,
etc.)
•
Rectangular clipping of frame buffer areas minimizes
PCI-bus load
•
Random shape mask clipping protects selectable areas
of frame buffer
•
3
×
128 Dword video FIFO with overflow detection and
‘graceful’ recovery.
1.2
Audio processing
1.3
Scaling
•
Scaling of video pictures down to randomly sized
windows (vertical down to 1 : 1024; horizontal down to
1 : 256)
•
High Performance Scaler (HPS) offers two-dimensional,
phase correct data processing for improved signal
quality of scaled video data, especially for compression
applications
•
Horizontal and vertical FIR filters with up to 65 taps
•
Horizontal upscaling (zoom) supports e.g. CCIR to
square pixel conversion
•
Additional Binary Ratio Scaler (BRS) supports CIF and
QCIF formats, especially for video phone and video
conferencing.
1.4
Interfacing
•
Dual D1 (8-bit, CCIR 656) video I/O interface
•
DMSD2 compatible (16-bit YUV) video input interface
•
Supports various packed (pixel dithering) and planar
video output formats
•
Data Expansion Bus Interface (DEBI) for interfacing with
e.g. MPEG or JPEG decoders with Intel (ISA like) and
Motorola (68000 like) protocol style, capability for
immediate and block mode (DMA) transfers with up to
23 Mbytes/s peak data rate
•
5 digital audio I/O ports
•
4 independent user configurable General Purpose I/O
Ports (GPI/O) for interrupt and status processing
•
PCI interface (release 2.1)
•
I
2
C-bus interface (bus master).
•
Time Slot List (TSL) processing for flexible control of
audio frames up to 256 bits on 2 asynchronous
bidirectional digital audio interfaces simultaneously
(4 DMA channels)
•
Video synchronous audio capture, e.g. for sound cards
•
Various synchronization modes to support I
2
S-bus and
other different audio and DSP data formats
•
Audio input level monitoring enables peak control via
software
•
Programmable bit clock generation for master and slave
applications.
2004 Aug 25
3
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
1.5
General
2
GENERAL DESCRIPTION
SAA7146A
•
Subsystem (board) vendor ID support for board
identification via software driver
•
Internal arbitration control
•
Diagnostic support and event analysis
•
Programmable Vertical Blanking Interval (VBI) data
region for e.g. to support INTERCAST, teletext, closed
caption and similar applications
•
3.3 V supply enables reduced power consumption, 5 V
tolerant I/Os for 5 V PCI signalling environment.
3
QUICK REFERENCE DATA
SYMBOL
V
DDD
I
DDD(tot)
V
i
; V
o
f
LLC
f
PCI
f
I2S
T
amb
4
digital supply voltage
total digital supply current
data input/output levels
LLC input clock frequency
PCI input clock frequency
I
2
S-bus input clock frequency
operating ambient temperature
PARAMETER
The SAA7146A, Multimedia PCI-bridge, is a highly
integrated circuit for DeskTop Video (DTV) applications.
The device provides a number of interface ports that
enable a wide variety of video and audio ICs to be
connected to the PCI-bus thus supporting a number of
video applications in a PC. One example of the application
capabilities is shown in Fig.48.
Figure 1 shows the various interface ports and the main
internal function blocks.
MIN.
3.0
−
−
−
−
0
TYP.
3.3
400
−
−
−
−
−
MAX.
3.6
V
UNIT
mA
MHz
MHz
MHz
°C
TTL compatible
32
33
12.5
70
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
QFP160
DESCRIPTION
plastic quad flat package; 160 leads (lead length 1.6 mm);
body 28
×
28
×
3.4 mm; high stand-off height
VERSION
SOT322-2
SAA7146AH
2004 Aug 25
4
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