ignations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Al-
tera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants
performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make
changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the ap-
plication or use of any information, product, or service described herein except as expressly agreed to in writing by Altera
Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published in-
formation and before placing orders for products or services
.
Part Number UG-01025-1.1
ii
Development Board Version 1.0.0
Nios II Embedded Evaluation Kit, Cyclone III Edition User Guide
Installing the Nios II Embedded Evaluation Kit, Cyclone III Edition CD-ROM .................... 1–8
Installing the Altera Complete Design Suite Software ............................................................. 1–10
Licensing the Quartus II Software ............................................................................................... 1–10
Licensing the IP .............................................................................................................................. 1–11
Licensing the EL Camino SD Card Core ..................................................................................... 1–13
Chapter 2. Development Board Setup
Features ................................................................................................................................................... 2–1
Why is my SOF time-limited? ....................................................................................................... D–1
What are Ready to Run Demos? ................................................................................................... D–1
Where can I find Ready to Run Demos? ...................................................................................... D–1
What is in a Ready to Run Demo ? ............................................................................................... D–2
How do Ready to Run demos get loaded from the SD card to the FPGA? ............................ D–2
Where can I get more Ready to Run Demos? .............................................................................. D–2
Where can I get full Quartus II projects and source code for Ready to Run Demos? ........... D–2
iv
Preliminary
Altera Corporation
August 2008
Contents
Contents
Why do I get the error “Can't find valid feature line for core SD_MMC_SPI_CORE (EC11_0002)
in current license;
Error: Error (10003): Can't open encrypted VHDL or Verilog HDL file” when I try to re-
generate the Nios II Standard hardware design? ....................................................................... D–3
Where can I get the SD-Card Controller IP License? ................................................................. D–3
How do I add pictures so the Picture Viewer Application can find them? ............................ D–3
How do I add my own design so the Application Selector can find and run it? ................... D–4
Where do I go to get more designs for the Nios II Embedded Evaluation Kit? ..................... D–4
How do I open a design example in the Nios II IDE? ................................................................ D–4
How do I restore the factory image? ............................................................................................ D–5
How do I re-build the factory image? .......................................................................................... D–5
Additional Information
Further Information ............................................................................................................................... i–i
stm32/stm8
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