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Reference: CMV2000-datasheet-v3.8
CMV2000 v3 Datasheet
Page 1 of 63
2.2 Megapixel machine vision CMOS image sensor
Datasheet
© 2015 CMOSIS bvba
Reference: CMV2000-datasheet-v3.8
CMV2000 v3 Datasheet
Page 2 of 63
Change record
Issue
1
1.1
1.2
1.3
2.7
Date
06/05/2009
12/11/2009
11/01/2010
14/01/2010
29/03/2010
Modification
Origination
- Corrected register address of sub_s[7:0] to ‘35’ (p 29/30/33)
Adjusted min input frequency (chapter 3.5)
Adjusted pin width in package drawing
Added spectral response
Added spectral response for color devices
Updated specifications for version 2 devices
Changed VDD18 to VDD20
Added ordering info
Added handling and soldering procedures
Removed “confidential” from footer
Added recommended and adjustable register settings
Frame rate calculation included
Read-out in 12 bit mode added
Added exposure time offset ((0.65 x register73 x clk_per x 129)
Added Vtf_l1 to GND remark
Added E12 spectral response curve and part numbers
Added RGB Bayer pattern details
Added electrical IO specifications
Updated reflow soldering profile
Changed tilt to 0.2 degrees, updated spectral response, changed exposure time
formula
Changed 12 bit read-out mode (removed 16 and 8 outputs)
Complete revision for version 3 sensor
Line up with v2.9.5 datasheet
Added:
- PLR Vlow2/3 enable bit
- Sampling of digital inputs on rising CLK_IN
- Details on LVDS data out in multiplex modes
- CTR channel bits on Tdig1/2 pins
- Evaluation kit available
- Minimum time between Frame_req pulses in internal mode
- Temperature sensor calibration example
Updated:
- Bayer pattern figure (pixel(0,0) green
red). No actual device change
compared to previous devices.
- Supply noise influence
- Control bit INTE1/2 (no FOT overlap)
- FOT and Read-out time rounding
- Detailed timing of control channel figure
- LVDS clock delay figure (CLK_IN period)
- SPI timing from SPI upload to Frame_req (1µs
1ms)
- Total power use (600mW
650mW)
- VDD33 power use (165mW
200mW)
- VDD supplies internal PLL
Removed:
- Reference errors
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.9.1
3
3.1
3.2
22/7/2010
2/8/2010
1/9/2010
17/9/2010
19/10/2010
11/1/2011
1/2/2011
25/3/2011
13/4/2011
20/5/2011
1/9/2011
24/05/2012
30/07/2012
© 2015 CMOSIS bvba
Reference: CMV2000-datasheet-v3.8
CMV2000 v3 Datasheet
Issue
3.3
Date
01/08/2013
Modification
Added:
Page 3 of 63
Pin head dimensions to package drawing
Tdig1 and Tdig2 addresses to register overview
Recommended FOT register settings to register overview
Angular response curve
Minimum exposure value
Updated:
-
Training pattern of control channel
-
Text and figure in Image flipping chapter
-
Text and figure in Color Filter chapter
-
Assembly drawing: now refers to pixel(0,0), added dimensions, transparent
view, pin numbers and corrected tilt of die
-
Supply settings table: peak current calculation, typical values to
recommended values, supply voltage range
-
Connection diagram: changed 1.8V to 1.9V
-
Response curve: replaced figure
-
Temperature sensor figure now refers to pixel(0,0)
-
Expanded PLL settings table
-
Ordering information: part numbers
-
New table for PLL range in Data rate chapter, corrected frequency range
- Start-up sequence: time after SPI upload described more accurately
- LVDS driver specification: Voc dependency
Removed:
-
Input clock skew limits
-
-
-
-
-
3.4
27/09/2013
Added:
Settling time to reset sequence (Figure 9)
Updated:
-
Recommended register settings and register overview
-
Dimensions in assembly drawing: 0.76mm to 1.76mm
-
LVDS clock enable address from 82[3] to 82[2]
-
Corrected figure 19
-
SPI_OUT is now an output in the connection diagram
-
Recommended VDD2.0 setting is now 2.0V
Updated:
- Settling time is now included in reset sequence figure
- Assembly drawing: corrected pixel(0,0) location
- Mechanical drawing: new drawing features correct cavity dimensions;
higher resolution
- Figure 29: corrected aspect ratio
- Some layout improvements
- Temperature sensor location figure
-
3.5
3/12/2013
© 2015 CMOSIS bvba
Reference: CMV2000-datasheet-v3.8
CMV2000 v3 Datasheet
Issue
3.6
Date
28/03/2014
Modification
Page 4 of 63
3.7
28/01/2015
3.8
18/06/2015
Added:
-
Register addresses now show bit location in Chapter 5
-
All PLL registers are now in the register overview
-
Recommendation for unused pins
-
Note that fot_length register can be lowered for shorter integration times
-
Note that LVDS output current can be lowered for meeting EMC standards
-
Ordering information now includes part numbers for all packages
Updated:
- Corrected some register addresses in the register overview
- LCC spec was listed as 95 pins, should be 92
- Description of settling time should be more clear now, added typical values
- Description of start-up and reset sequence
- Description of PGA settings should be more clear now
- Description of register optimization is now more complete
- Improved some layout issues
- Corrected table in Chapter 5.2.2.1: Vlow3 wrongly referred to Vlow2
- PLL registers in register overview: bit locations were not always correct
- Pin list table is now sorted on function, rather than pin coordinate
- New figures for glass transmittance, QE and response
- “color” register is now called “mono” because it better fits the functionality
Removed:
- Recommended setting of “0” for i_lvds_rec was causing confusion
- Pixel coordinates on block diagram
Updated:
- The power figure in the Specification Overview is now more accurate; it
considers the sensor configuration
- The exposure time is shortest in external exposure mode, so this mode is
added to the calculation.
- FRAME_REQ is level sensitive, not edge sensitive
- Maximum number of frames is 65535, not 65548
- Corrected note that said that the exposure starts directly after F_REQ, there
is a delay between the two
- Corrected calibration procedure, step 2 should be repeated, not step 1.
Removed
- Nr_slopes2 register from overview, this is an unused register
- Scratch/dig/bubble spec for cover glass
Updated:
- LCC pin layout now correctly says it’s the bottom view, not the top
- LCC Product number now for AR coated glass only
Added
- Transmittance curve for AR coated glass
Disclaimer
CMOSIS reserves the right to change the product, specification and other information contained in this document
without notice. Although CMOSIS does its best efforts to provide correct information, this is not warranted.
© 2015 CMOSIS bvba