PD -91340A
IRF520NS/L
HEXFET
®
Power MOSFET
l
l
l
l
l
l
Advanced Process Technology
Surface Mount (IRF520NS)
Low-profile through-hole (IRF520NL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
D
V
DSS
= 100V
R
DS(on)
= 0.20Ω
G
S
I
D
= 9.7A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for use in a wide variety
of applications.
The D
2
Pak is a surface mount power package capable of accommodating die
sizes up to HEX-4. It provides the highest power capability and the lowest
possible on-resistance in any existing surface mount package. The D
2
Pak is
suitable for high current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface mount application.
The through-hole version (IRF520NL) is available for low-profile applications.
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
9.7
6.8
38
3.8
48
0.32
± 20
91
5.7
4.8
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
–––
Max.
3.1
40
Units
°C/W
5/13/98
IRF520NS/L
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
100
–––
–––
2.0
2.7
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.5
23
32
23
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.20
Ω
V
GS
= 10V, I
D
= 5.7A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 5.7A
25
V
DS
= 100V, V
GS
= 0V
µA
250
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
25
I
D
= 5.7A
4.8
nC V
DS
= 80V
11
V
GS
= 10V, See Fig. 6 and 13
–––
V
DD
= 50V
–––
I
D
= 5.7A
ns
–––
R
G
= 22Ω
–––
R
D
= 8.6Ω, See Fig. 10
Between lead,
nH
7.5 –––
and center of die contact
330 –––
V
GS
= 0V
92 –––
pF
V
DS
= 25V
54 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 9.7
showing the
A
G
integral reverse
––– ––– 38
S
p-n junction diode.
––– ––– 1.3
V
T
J
= 25°C, I
S
= 5.7A, V
GS
= 0V
––– 99 150
ns
T
J
= 25°C, I
F
= 5.7A
––– 390 580
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
Uses IRF520N data and test conditions
V
DD
= 25V, starting T
J
= 25°C, L = 4.7mH
R
G
= 25Ω, I
AS
= 5.7A. (See Figure 12)
T
J
≤
175°C
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
I
SD
≤
5.7A, di/dt
≤
240A/µs, V
DD
≤
V
(BR)DSS
,
IRF520NS/L
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BO TTOM 4.5V
TO P
100
10
I , D rain-to-Source Current (A )
D
I , D ra in-to -S o urc e C u rren t (A )
D
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
10
4 .5V
2 0µ s P U L S E W ID TH
T
C
= 17 5°C
0.1
1
10
100
4 .5V
2 0µ s P U L S E W IDTH
T
C
= 25 °C
0.1
1
10
100
1
A
1
A
V D S , D rain-to-S ource V oltage (V )
V DS , D rain-to-S ource V oltage (V )
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
3.0
R
D S (on)
, Drain-to-S ource O n Resistance
(N orm alized)
I
D
= 9 .5A
I
D
, D rain-to-So urce C urren t (A )
2.5
2.0
T
J
= 25 °C
10
T
J
= 1 7 5°C
1.5
1.0
0.5
1
4
5
6
7
V
DS
= 5 0V
2 0µ s P U L S E W ID TH
8
9
10
A
0.0
-60
-40
-20
0
20
40
60
80
V
G S
= 10 V
100 120 140 160 180
A
V
G S
, G ate-to -So urce Voltag e (V)
T
J
, Junction T em perature (°C )
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRF520NS/L
600
500
C
iss
C , Capacitance (pF)
400
300
C
oss
V
G S
, G ate-to-S ource V oltage (V )
V
GS
C
is s
C
rs s
C
o ss
=
=
=
=
0V ,
f = 1M H z
C
g s
+ C
g d
, C
d s
S H O R T E D
C
gd
C
d s
+ C
gd
20
I
D
= 5.7 A
16
V
D S
= 80 V
V
D S
= 50 V
V
D S
= 20 V
12
8
200
C
rss
100
4
0
1
10
100
A
0
0
5
10
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
15
20
25
A
V
D S
, D rain-to-S ourc e V oltage (V )
Q
G
, T otal G ate C harge (nC )
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
I
SD
, Reverse D rain C urrent (A)
O P E R A TIO N IN TH IS A R E A LIM ITE D
B Y R
D S (o n)
10µs
I
D
, Drain C urrent (A )
10
100µ s
T
J
= 17 5°C
10
T
J
= 2 5°C
1m s
1
10m s
1
0.4
0.6
0.8
1.0
V
G S
= 0V
1.2
A
0.1
1
T
C
= 25 °C
T
J
= 17 5°C
S ing le P u lse
10
100
1.4
1000
A
V
S D
, S ourc e-to-D rain V oltage (V )
V
D S
, D rain-to-S ource V oltage (V )
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRF520NS/L
V
DS
10.0
R
D
V
GS
R
G
8.0
D.U.T.
+
-
V
DD
I
D
, Drain Current (A)
10V
6.0
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
4.0
Fig 10a.
Switching Time Test Circuit
V
DS
2.0
90%
0.0
25
50
75
100
125
150
175
T
C
, Case Temperature ( °C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
D = 0.50
1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
0.1
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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