transformer-based bidirectional active balancing of multi-
cell battery stacks. All associated gate drive circuitry,
precision current sensing, fault detection circuitry and a
robust serial interface with built-in watchdog timer are
integrated.
Each LTC3300-2 can balance up to 6 series-connected
battery cells with an input common mode voltage up to
36V. Charge from any selected cell can be transferred at
high efficiency to or from 12 or more adjacent cells. Each
LTC3300-2 has an individually addressable serial interface,
allowing up to 32 LTC3300-2 devices to interface to one
control processor.
Fault protection features include readback capability, cy-
clic redundancy check (CRC) error detection, maximum
on-time volt-second clamps, and overvoltage shutoffs.
The related LTC3300-1 offers a serial interface that allows
the serial ports of multiple LTC3300-1 devices to be daisy-
chained without opto-couplers or isolators.
n
n
n
n
n
n
n
n
Bidirectional Synchronous Flyback Balancing
of Up to 6 Li-Ion or LiFePO
4
Cells in Series
Up to 10A Balancing Current (Set by Externals)
Integrates Seamlessly with the LTC680x Family of
Multicell Battery Stack Monitors
Bidirectional Architecture Minimizes Balancing
Time and Power Dissipation
Up to 92% Charge Transfer Efficiency
Stackable Architecture Enables >800V Systems
Uses Simple 2-Winding Transformers
1MHz Serial Interface with 4-Bit
CRC Packet Error Checking
Individually Addressable with 5-Bit Address
Numerous Fault Protection Features
48-Lead Exposed Pad QFN and LQFP Packages
APPLICATIONS
n
n
n
Electric Vehicles/Plug-in HEVs
High Power UPS/Grid Energy Storage Systems
General Purpose Multicell Battery Stacks
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and isoSPI
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
TYPICAL APPLICATION
NEXT CELL ABOVE
CHARGE
SUPPLY
(I
CHARGE
1-6)
CHARGE
RETURN
(I
DISCHARGE
1-6)
High Efficiency Bidirectional Balancing
+
+
•
Balancer Efficiency
CELL 12
LTC3300-2
4
5
100
CHARGE TRANSFER EFFICIENCY (%)
ISOLATOR
DC2064A DEMO BOARD
I
CHARGE
= I
DISCHARGE
= 2.5A
V
CELL
= 3.6V
CHARGE
90
DISCHARGE
CELL 7
CELL 6
ADDRESS
n
+ 1
95
CHARGE
RETURN
I
DISCHARGE
+
•
4
4
LTC3300-2
I
CHARGE
SERIAL I/O
85
•
CHARGE
SUPPLY
+
80
CELL 1
4
ADDRESS
n
33002 TA01a
4
6
8
10
12
NUMBER OF CELLS (SECONDARY SIDE)
33001 TA01b
•
ISOLATOR
5
NEXT CELL BELOW
33002f
For more information
www.linear.com/LTC3300-2
1
LTC3300-2
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (C6 to V
–
).................................36V
Input Voltage (Relative to V
–
)
C1 ........................................................... –0.3V to 6V
I1P ....................................................... –0.3V to 0.3V
I1S, I2S, I3S, I4S, I5S, I6S .................... –0.3V to 0.3V
CSBI, SCKI, SDI ....................................... –0.3V to 6V
V
REG
, SDO ............................................... –0.3V to 6V
RTONP, RTONS ...........–0.3V to Min[V
REG
+ 0.3V, 6V]
CTRL, BOOST, WDT .... –0.3V to Min[V
REG
+ 0.3V, 6V]
A4, A3, A2, A1, A0....... –0.3V to Min[V
REG
+ 0.3V, 6V]
Voltage Between Pins
Cn to Cn-1* .............................................. –0.3V to 6V
InP to Cn-1* .......................................... –0.3V to 0.3V
BOOST
+
to C6 .......................................... –0.3V to 6V
SDO Current ...........................................................10mA
G1P, GnP, G1S, GnS, BOOST
–
Current............... ±200mA
Operating Junction Temperature Range (Notes 2, 7)
LTC3300I-2 ........................................ –40°C to 125°C
LTC3300H-2 ...................................... –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
*n = 2 to 6
PIN CONFIGURATION
48 V
REG
47 A4
46 A3
45 A2
44 A1
43 A0
42 BOOST
41 BOOST
–
40 BOOST
+
39 C6
38 G6P
37 I6P
48
47
46
45
44
43
42
41
40
39
38
37
36 C5
35 G5P
34 I5P
33 C4
32 G4P
31 I4P
30 C3
29 G3P
28 I3P
27 C2
26 G2P
25 I2P
G6S 1
I6S 2
G5S 3
I5S 4
G4S 5
I4S 6
G3S 7
I3S 8
G2S 9
I2S 10
G1S 11
I1S 12
V
REG
A4
A3
A2
A1
A0
BOOST
BOOST
–
BOOST
+
C6
G6P
I6P
TOP VIEW
TOP VIEW
G6S 1
I6S 2
G5S 3
I5S 4
G4S 5
I4S 6
G3S 7
I3S 8
G2S 9
I2S 10
G1S 11
I1S 12
49
V
–
49
V
–
36
35
34
33
32
31
30
29
28
27
26
25
C5
G5P
I5P
C4
G4P
I4P
C3
G3P
I3P
C2
G2P
I2P
RTONS 13
RTONP 14
CTRL 15
CSBI 16
SCKI 17
SDI 18
SDO 19
WDT 20
V
–
21
I1P 22
G1P 23
C1 24
UK PACKAGE
48-LEAD (7mm
×
7mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 34°C/W,
θ
JC
= 3°C/W
EXPOSED PAD (PIN 49) IS V
–
, MUST BE SOLDERED TO PCB
LXE PACKAGE
48-LEAD (7mm
×
7mm) PLASTIC LQFP
T
JMAX
= 150°C,
θ
JA
= 20.46°C/W,
θ
JC
= 3.68°C/W
EXPOSED PAD (PIN 49) IS V
–
, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3300IUK-2#PBF
LTC3300HUK-2#PBF
LEAD FREE FINISH
LTC3300ILXE-2#PBF
LTC3300HLXE-2#PBF
TAPE AND REEL
LTC3300IUK-2#TRPBF
LTC3300HUK-2#TRPBF
TRAY
LTC3300ILXE-2#PBF
LTC3300HLXE-2#PBF
PART MARKING*
LTC3300UK-2
LTC3300UK-2
PART MARKING*
LTC3300LXE-2
LTC3300LXE-2
PACKAGE DESCRIPTION
48-Lead (7mm
×
7mm) Plastic QFN
48-Lead (7mm
×
7mm) Plastic QFN
PACKAGE DESCRIPTION
48-Lead (7mm
×
7mm) Plastic eLQFP
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 150°C
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 150°C
48-Lead (7mm
×
7mm) Plastic eLQFP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
33002f
2
For more information
www.linear.com/LTC3300-2
RTONS 13
RTONP 14
CTRL 15
CSBI 16
SCKI 17
SDI 18
SDO 19
WDT 20
V
–
21
I1P 22
G1P 23
C1 24
LTC3300-2
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
DC Specifications
Supply Current When Not
I
Q_SD
Balancing (Post Suspend or Pre
First Execute)
Supply Current When Balancing
I
Q_ACTIVE
(Note 3)
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. (Note 2) BOOST
+
= 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V,
C3 = 10.8V, C2 = 7.2V, C1 = 3.6V, V
–
= 0V, unless otherwise noted.
CONDITIONS
Measured at C1, C2, C3, C4, C5
Measured at C6
Measured at BOOST
+
Balancing C1 Only (Note 4 for V
–
, C2, C6)
Measured at C1
Measured at C2, C3, C4, C5
Measured at C6
Measured at BOOST
+
Balancing C2 Only (Note 4 for C1, C3, C6)
Measured at C1
Measured at C2
Measured at C3, C4, C5
Measured at C6
Measured at BOOST
+
Balancing C3 Only (Note 4 for C2, C4, C6)
Measured at C1, C4, C5
Measured at C2
Measured at C3
Measured at C6
Measured at BOOST
+
Balancing C4 Only (Note 4 for C3, C5, C6)
Measured at C1, C2, C5
Measured at C3
Measured at C4
Measured at C6
Measured at BOOST
+
Balancing C5 Only (Note 4 for C4, C6)
Measured at C1, C2, C3
Measured at C4
Measured at C5
Measured at C6
Measured at BOOST
+
Balancing C6 Only (Note 4 for C5, C6, BOOST
+
)
Measured at C1, C2, C3, C4
Measured at C5
Measured at C6
Measured at BOOST
+
(BOOST = V
–
)
Measured at BOOST
+
(BOOST = V
REG
)
Cn to Cn
– 1
Voltage to Balance Cn,
n
= 2 to 6
C1 Voltage to Balance C1
Cn + 1 to Cn Voltage to Balance Cn,
n
= 1 to 5
BOOST
+
to C6 Voltage to Balance C6, BOOST = V
–
C1, Cn to Cn
– 1
Voltage to Balance Any Cell,
n
= 2 to 6
MIN
TYP
0
14
0
250
70
560
0
–105
–70
250
70
560
0
70
–70
250
560
0
70
–70
250
560
0
70
–70
250
560
0
70
–70
740
60
0
2
2
2
2
70
5
0.5
l
MAX
1
22
10
375
105
840
10
375
105
840
10
105
375
840
10
105
375
840
10
105
375
840
10
105
1110
90
10
2.2
2.2
2.2
2.2
5.3
UNITS
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
V
V
V
V
mV
V
V
V
6
–105
–105
–105
–105
V
CELL|MIN
Minimum Cell Voltage (Rising)
Required for Primary Gate Drive
l
l
l
l
1.8
1.8
1.8
1.8
4.7
V
CELL|MIN(HYST)
V
CELL|MIN
Comparator Hysteresis
Maximum Cell Voltage (Rising)
V
CELL|MAX
Before Disabling Balancing
V
CELL|MAX(HYST)
V
CELL|MAX
Comparator Hysteresis
V
CELL|RECONNECT
Maximum Cell Voltage (Falling) to
Re-Enable Balancing
Regulator Pin Voltage
V
REG
V
REG
Voltage (Rising) for
V
REG|POR
Power-On Reset
Minimum V
REG
Voltage (Falling)
V
REG|MIN
for Secondary Gate Drive
l
4.25
4.4
4.8
4.0
5.2
9V ≤ C6 ≤ 36V, 0mA ≤ I
LOAD
≤ 20mA
l
V
V
V
33002f
V
REG
Voltage to Balance Cn,
n
= 1 to 6
l
3.8
For more information
www.linear.com/LTC3300-2
3
LTC3300-2
ELECTRICAL CHARACTERISTICS
SYMBOL
I
REG_SC
PARAMETER
Regulator Pin Short Circuit Current
Limit
RTONP Servo Voltage
V
RTONP
RTONS Servo Voltage
V
RTONS
WDT Pin Current, Balancing
I
WDT_RISING
WDT Pin Current as a Percentage
I
WDT_FALLING
of I
WDT_RISING
, Secondary OV
Primary Winding Peak Current
V
PEAK_P
Sense Voltage
V
PEAK_P
Matching (All 6)
Secondary Winding Peak Current
V
PEAK_S
Sense Voltage
V
PEAK_S
Matching (All 6)
Primary Winding Zero Current
V
ZERO_P
Sense Voltage (Note 5)
V
ZERO_P
Matching (All 6)
Normalized to Mid-Range V
PEAK_P
Secondary Winding Zero Current
V
ZERO_S
Sense Voltage (Note 5)
V
ZERO_S
Matching (All 6)
Normalized to Mid-Range V
PEAK_S
BOOST
–
Pin Pull-Down R
ON
R
BOOST_L
BOOST
–
Pin Pull-Up R
ON
R
BOOST_H
Thermal Shutdown Threshold
T
SD
(Note 7)
Thermal Shutdown Hysteresis
T
HYS
Timing Specifications
Primary Winding Gate Drive Rise
t
r_P
Time (10% to 90%)
Primary Winding Gate Drive Fall
t
f_P
Time (90% to 10%)
Secondary Winding Gate Drive
t
r_S
Rise Time (10% to 90%)
Secondary Winding Gate Drive Fall
t
f_S
Time (90% to 10%)
Primary Winding Switch Maximum
t
ONP|MAX
On-Time
t
ONP|MAX
Matching (All 6)
Secondary Winding Switch
t
ONS|MAX
Maximum On-Time
t
ONS|MAX
Matching (All 6)
Delayed Start Time After New/
t
DLY_START
Different Balance Command or
Recovery from Voltage/Temp Fault
SPI Port Timing Specifications
SDI Valid to SCKI Rising Setup
t
1
SDI Valid from SCKI Rising Hold
t
2
SCKI Low
t
3
SCKI High
t
4
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. (Note 2) BOOST
+
= 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V,
C3 = 10.8V, C2 = 7.2V, C1 = 3.6V, V
–
= 0V, unless otherwise noted.
CONDITIONS
V
REG
= 0V
R
RTONP
= 20kΩ
R
RTONS
= 15kΩ
R
TONS
= 15kΩ, WDT = 0.5V
R
TONS
= 15kΩ, WDT = 2V
I1P
InP to Cn
– 1, n
= 2 to 6
±[(Max – Min)/(Max + Min)] • 100%
I1S
InS to Cn
– 1, n
= 2 to 6, CTRL = 0 Only
±[(Max – Min)/(Max + Min)] • 100%
I1P
InP to Cn
– 1, n
= 2 to 6
±{[(Max – Min)/2]/(V
PEAK_P|MIDRANGE
)} • 100%
(Note 6)
I1S
InS to Cn – 1,
n
= 2 to 6, CTRL = 0 Only
±{[(Max – Min)/2]/(V
PEAK_S|MIDRANGE
)} • 100%
(Note 6)
Measured at 100mA Into Pin, BOOST = V
REG
Measured at 100mA Out of Pin, BOOST = V
REG
Rising Temperature
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
MIN
TYP
55
1.2
1.2
80
87.5
50
50
±1.7
50
50
±0.5
–2
–2
±1.7
–7
–7
±0.5
2.5
4
155
10
MAX
UNITS
mA
V
V
µA
%
mV
mV
%
mV
mV
%
mV
mV
%
mV
mV
%
Ω
Ω
°C
°C
1.158
1.158
72
85
45
45
45
45
–7
–7
1.242
1.242
88
90
55
55
±5
55
55
±3
3
3
±5
–2
–2
±3
–12
–12
G1P Through G6P C
GATE
= 2500pF
,
G1P Through G6P C
GATE
= 2500pF
,
G1S, C
GATE
= 2500pF
G2S Through G6S, CTRL = 0 Only, C
GATE
= 2500pF
G1S, C
GATE
= 2500pF
G2S Through G6S, CTRL = 0 Only, C
GATE
= 2500pF
l
R
RTONP
= 20kΩ (Measured at G1P-G6P)
±[(Max – Min)/(Max + Min)] • 100%
R
RTONS
= 15kΩ (Measured at G1S-G6S)
±[(Max – Min)/(Max + Min)] • 100%
l
l
l
35
20
30
30
20
20
7.2
±1
1.2
±1
2
70
40
60
60
40
40
8.4
±4
1.4
±4
ns
ns
ns
ns
ns
ns
µs
%
µs
%
ms
6
1
Write Operation
Write Operation
l
l
l
l
10
250
400
400
33002f
ns
ns
ns
ns
4
For more information
www.linear.com/LTC3300-2
LTC3300-2
ELECTRICAL CHARACTERISTICS
SYMBOL
t
5
t
6
t
7
t
8
f
CLK
t
WD1
t
WD2
PARAMETER
CSBI Pulse Width
SCKI Rising to CSBI Rising
CSBI Falling to SCKI Rising
SCKI Falling to SDO Valid
Clock Frequency
Watchdog Timer Timeout Period
Watchdog Timer Reset Time
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. (Note 2) BOOST
+
= 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V,
C3 = 10.8V, C2 = 7.2V, C1 = 3.6V, V
–
= 0V, unless otherwise noted.
CONDITIONS
l
l
l
MIN
400
100
100
TYP
MAX
Read Operation
WDT Assertion Measured from Last Valid
Command Byte
WDT Negation Measured from Last Valid
Command Byte
Pins CSBI, SCKI, SDI
Pins CTRL, BOOST
Pins A4, A3, A2, A1, A0
Pin WDT
Pins CSBI, SCKI, SDI
Pins CTRL, BOOST
Pins A4, A3, A2, A1, A0
Pin WDT
Pins CSBI, SCKI, SDI
Pins CTRL, BOOST
Pins A4, A3, A2, A1, A0
Pin WDT, Timed Out
Pins CSBI, SCKI, SDI
Pins CTRL, BOOST
Pins A4, A3, A2, A1, A0
Pin WDT, Not Balancing
Pin SDO, Sinking 500µA; Read
Pin SDO at 6V
l
l
l
l
0.75
1.5
1.5
250
1
2.25
5
UNITS
ns
ns
ns
ns
MHz
second
µs
Digital I/O Specifications
Digital Input Voltage High
V
IH
l
l
l
l
l
l
l
l
V
REG
– 0.5
V
REG
– 0.5
V
REG
– 0.5
2
0.5
0.5
0.5
0.8
1
1
1
1
1
1
1
1
0.3
100
V
IL
Digital Input Voltage Low
I
IH
Digital Input Current High
I
IL
Digital Input Current Low
–1
–1
–1
–1
–1
–1
–1
–1
l
l
0
0
0
0
0
0
0
0
V
OL
I
OH
Digital Output Voltage Low
Digital Output Current High
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
V
nA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3300-2 is tested under pulsed load conditions such
that T
J
≈ T
A
. The LTC3300I-2 is guaranteed over the –40°C to 125°C
operating junction temperature range and the LTC3300H-2 is guaranteed
over the –40°C to 150°C operating junction temperature. High junction
temperatures degrade operating lifetimes; operating lifetime is derated
for junction temperatures greater than 125°C. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
temperature (T
J
, in °C) is calculated from the ambient temperature
(T
A
, in °C) and power dissipation (P
D
, in Watts) according to the formula:
T
J
= T
A
+ (P
D
•
θ
JA
)
where
θ
JA
(in °C/W) is the package thermal impedance.
Note 3:
When balancing more than one cell at a time, the individual cell
supply currents can be calculated from the values given in the table as
follows: First add the appropriate table entries cell by cell for the balancers
that are on. Second,
for each additional balancer that is on,
subtract 70µA
from the resultant sums for C1, C2, C3, C4, and C5, and 450µA from the
resultant sum for C6. For example, if all six balancers are on, the resultant
current for C1 is [250 – 70 + 70 + 70 + 70 + 70 – 5(70)]µA = 110µA and
for C6 is [560 + 560 + 560 + 560 + 560 + 740 – 5(450)]µA = 1290µA.
Note 4:
Dynamic supply current is higher due to gate charge being
delivered at the switching frequency during active balancing. See Gate
Drivers/Gate Drive Comparators and Voltage Regulator in the Operation
section for more information on estimating these currents.
Note 5:
The zero current sense voltages given in the table are DC
thresholds. The actual zero current sense voltage seen in application will
be closer to zero due to the slew rate of the winding current and the finite
delay of the current sense comparator.
Note 6:
The mid-range value is the average of the minimum and maximum
readings within the group of six.
Note 7:
This IC includes overtemperature protection intended to protect
the device during momentary overload conditions. The maximum junction
temperature may be exceeded when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
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