QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 481
1.5A, 200KHZ STEP-DOWN CONVERTER WITH BURST MODE
LT1976
DESCRIPTION
Demonstration circuit 481 is a monolithic step-
down DC/DC switching converter featuring the
LT1976. The board is optimized for 3.3V output at
up to 1A load current for an input voltage range of
4V to 60V.
Minimum on-time restrictions and 3.3V
output may limit the steady state maximum input
voltage to 42V (up to 47V for some boards) before
pulse skipping occurs.
With its wide input voltage
range, 1.5A internal power switch, 100µA supply
current (at input voltages above 14V), 200kHz
switching frequency and thermally enhanced
package, the LT1976 is a very versatile and pow-
erful IC for DC/DC converters that require com-
pact space, high efficiency at both heavy and light
loads and high input voltage.
The LT1976 200kHz switching frequency allows all
of the components to be small, surface mount de-
vices. Synchronization with an external clock of up
to 700kHz is possible. The current-mode control
topology creates fast transient response and good
loop stability with a minimum number of external
components. The low resistance internal power
switch (0.2Ω) achieves high efficiencies of up to
90%. The SHDN pin can be used to program un-
dervoltage lockout or place the part in micropower
shutdown, reducing supply current to less than
1µA by driving the pin low. Burst Mode™ reduces
Table 1.
Typical Performance Summary (TA = 25°C)
CONDITION
V
OUT
= 3.3V, I
OUT
≤
1A
V
IN
= 4V to 60V, I
OUT
≤
1A
V
OUT
= 3.3V
V
IN
= 12V, I
OUT
= 1A, V
OUT
= 3.3V
V
IN
= 42V, I
OUT
= 1A, V
OUT
= 3.3V
V
IN
= 4V to 42V, I
OUT
≤
1A
V
IN
= 12V, I
OUT
= 1A, V
OUT
= 3.3V
V
IN
= 42V, I
OUT
= 1A, V
OUT
= 3.3V
VALUE
4–42V
60V
3.3V ± 3%
1A
34mV
PK–PK
42mV
PK-PK
200kHz
80%
72%
PARAMETER
Steady State Input Voltage Range
Maximum Transient Input Voltage
V
OUT
Maximum Output Current
Output Voltage Ripple
Switching Frequency
Efficiency
zero load current to under 100µA at most input
voltages (see Figure 3) while maintaining a regu-
lated output. A power good comparator and a tim-
ing delay can be used for additional system diag-
nostics and sequencing. The soft start function
reduces inrush current at soft start and output
voltage overshoot.
The LT1976 datasheet gives a complete descrip-
tion of the part, operation and applications infor-
mation. The datasheet must be read in conjunc-
tion with this Quick Start Guide for demonstration
circuit 481. In particular, the datasheet section on
‘Thermal Calculations’ is important for estimating
whether a given application’s combination of input
voltage, load current and frequency will cause the
LT1976 to exceed it’s absolute maximum rated
junction temperature. The LT1976 is assembled in
a small 16-pin thermally enhanced package with
exposed pad where proper board layout is essen-
tial for maximum thermal performance. See the
datasheet section ‘Layout Considerations’.
Design files for this circuit board are available.
Call the LTC factory.
Burst Mode is a trademark of Linear Technology Corporation.
1
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 481
1.5A, 200KHZ STEP-DOWN CONVERTER WITH BURST MODE
QUICK START PROCEDURE
Demonstration circuit 481 is easy to set up to
evaluate the performance of the LT1976. Refer to
Figure 1 for proper measurement equipment setup
and follow the procedure below:
exceed 60V.
NOTE:
The
NOTE:
Make
sure that the input voltage does not
synchronization, shutdown, and power
good functions are optional and their terminals
can be left floating (disconnected) if their functions
are not being used.
not hot-plug the input voltage terminal
VIN. The absolute maximum voltage on VIN is
60V and hot-plugging a power supply through wire
leads to the demonstration circuit can cause the
voltage on the extremely low-ESR ceramic input
capacitor to ring to twice its DC value. This is due
to high currents instantaneously generated in the
inductive supply leads from an input voltage step
on the low-ESR ceramic input capacitor. A bulky
higher-ESR capacitor, and an additional inductive
filter can be added to the circuit to dampen hot-
plug transient ringing.
See Application Note 88 for
more details.
In order to protect the IC, a transient
voltage suppressor diode can be added between
VIN and GND terminals to absorb any high volt-
age transient ringing that may occur due to hot-
plugging.
the power supply (with power off),
load, and meters as shown in Figure 1.
1.
NOTE:
Connect
NOTE:
Do
Figure 1. Proper Measurement Equipment Setup
FUNCTIONS & OPTIONS
BURST MODE
Burst Mode operation reduces light load quiescent
current by disabling switching for a number of
switch cycles and reducing supply current briefly
until switching begins again. Bursts of switch
pulses are enough to maintain output voltage
regulation at light load. Figure 3 shows the supply
current versus input voltage. At input voltages
above 12V, zero load supply current is less than
110µA.
Burst Mode extends battery life in applications
with long periods of inactivity. The tradeoff of hav-
ing Burst Mode is creating increased output volt-
age ripple at light load. For loads that require ex-
tremely well-regulated output voltages, additional
filtering may be used on the output to achieve ex-
tremely low output voltage ripple. At higher input
voltages (above 35V
IN
), Burst Mode may occur
below load currents as high as 300mA to 500mA.
OUTPUT VOLTAGE
The components assembled on the board are op-
timized for a wide input voltage range and a 3.3V
After all connections are made, turn on input
power and verify that the output voltage is 3.3V.
NOTE:
If
the output voltage is too low, temporar-
ily disconnect the load to make sure that the
load is not set too high.
2.
Once the proper output voltages are estab-
lished, adjust the load within the operating
range and observe the output voltage regula-
tion, ripple voltage, efficiency and other parame-
ters.
2
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 481
1.5A, 200KHZ STEP-DOWN CONVERTER WITH BURST MODE
The power good feedback pin can also be tied to
the input voltage, an external source, or a resistor
divider on any of these sources. Removing R10
breaks the connection between PGFB and FB.
The Power Good Feedback (PGFB Option) termi-
nal is optional and is not stuffed on the board. The
power good terminal node can be connected to
the power good feedback (PGFB) pin by placing a
0Ω resistor in R11. The PGFB Option should be
used when Power Good Feedback is required
from a source other than the feedback pin. Be
sure to remove the connection between PGFB
and FB by removing R10 as mentioned above.
Connect the desired Power Good Feedback
source to the PGFB Option terminal and either
short the terminal to PGFB pin with a 0Ω resistor
in R11 or place a resistor divider from PGFB to
GND with R11 and R12.
SHUTDOWN AND UNDERVOLTAGE LOCKOUT
The SHDN pin has a 200k pull-up resistor (R9)
tied to V
IN
. For normal operation, the SHDN
terminal can be left floating. However, connecting
the SHDN terminal to GND will place the IC in mi-
cropower shutdown. If the shutdown function is
not being used, the pull-up resistor can be re-
placed with a 0Ω resistor.
For undervoltage lockout, the two-resistor divider
network must be placed between V
IN
and SHDN
and between SHDN and GND. The top resistor
can be placed in R9. The bottom resistor can be
placed to the right of the SHDN terminal (the sol-
der mask may have to be removed.
Please see the data sheet section ‘Shutdown
Function and Undervoltage Lockout’
for more de-
tails.
SOFT START
Soft start removes the inrush current surge and
limits output voltage overshoot by controlling the
output voltage ramp-up rate. A single capacitor,
C7, holds the peak current level clamp low, allow-
ing it to slowly rise upon startup. When a short cir-
cuit, overload, or shutdown condition occurs, the
output. The feedback resistors (R2, R3) can be
changed to adjust the output voltage according to
the following equation:
V
OUT
= 1.24×(1 + R2/R3)
For output voltages below 3V, the boost pin re-
quires a higher voltage than the output can supply.
An alternate source for boost such as the input
voltage, a bias supply, or an external supply is re-
quired on the boost pin. Please see the datasheet
for details.
For output voltages greater than 5V, the optional
‘blocking’ zener diode D3 can be used to reduce
the boost voltage across C4 to some lower voltage
between 3V and 5V. The diode transfers power
dissipation from inside the LT1976 to the diode on
the demonstration circuit, outside the LT1976, al-
lowing higher ambient temperature operation of
the part. Maintaining boost voltage between 3V
and 5V maximizes efficiency and optimizes control
of the power switch. It is recommended that a
CMHZ5236B zener diode is used in D3 when
V
OUT
= 12V. To properly install D3, the small trace
shorting the anode to the cathode of D3 on the
board must be opened (an Exacto knife works
well) before D3 is soldered to the board. In the
‘Thermal Calculations’ section of the datasheet,
the new value for boost voltage (V
OUT
–V
Z
) should
be accounted for when calculating junction tem-
perature.
P
BOOST
= (V
OUT
-V
Z
)*V
OUT
*(I
OUT
/36)/V
IN
POWER GOOD FEEDBACK OPTION
For systems that rely upon having a well-regulated
power source or follow a particular power-up se-
quence, the LT1976 provides a power good flag
with timed delay programmed by C8 when the
power good feedback pin (PGFB) exceeds 90% of
V
REF
(1.25V). R10 (0 ohm short) ties PGFB and
the feedback pin (FB) together. Therefore, the
power good (PG) pin returns a ‘good’ signal when
the output voltage has reached 90% of its final
value. Figure 11 and Figure 12 show the power
good logic output turning on after a programmed
delay during startup.
3
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 481
1.5A, 200KHZ STEP-DOWN CONVERTER WITH BURST MODE
reduce the effect of slope compensation. High
sync frequencies combined with high duty cycles
(above 50%) may result in unexpected loop insta-
bility.
COMPENSATION
Demonstration Circuit 481 has a frequency com-
pensation network that is optimized for the tanta-
lum output capacitor C5, the wide input voltage
range 4V to 60V (42V steady state), and 3.3V out-
put. Improved loop bandwidth can be achieved for
various output voltages, output capacitors, and
input voltage ranges by adjusting R1, C2, and C1.
A feedforward capacitor (C10) and a resistor (R4
for short circuit feedback pin protection when C10
is used) are located in parallel with R2. Removing
these components from the feedback loop may
result in compromised loop stability. The use of
alternate output capacitors such as ceramics or
PosCaps may require changes to the compensa-
tion components. For more information, see the
‘Frequency Compensation’ section in the Applica-
tions Information in the datasheet, Application
Note 19, or Application Note 76.
soft start capacitor resets to zero and provides soft
start during restart. Switchers that do not have soft
start may transition from zero output to full output
voltage by taking as much current as possible
from the source and casting it into the output ca-
pacitor and load. This surge of current, only re-
stricted by maximum peak switch current levels,
can both drag down a battery source voltage and
cause overshoot in the output voltage.
For the shortest possible startup time, remove the
soft start capacitor from the circuit. Maximum in-
rush current can reach the level of 3A (the maxi-
mum switch current limit). Expect to see a signifi-
cant increase in output voltage overshoot.
Figure 11 and Figure 12 show the soft startup of
DC481 and the limited inrush current during
startup.
SYNCHRONIZATION
The synchronization frequency range for the
LT1976 is 235kHz to 700kHz. Use a logic level
sync signal with a duty cycle between 10% and
90% connected directly to the SYNC pin. Keep in
mind that synchronization at high frequencies may
4
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 481
1.5A, 200KHZ STEP-DOWN CONVERTER WITH BURST MODE
100%
90%
80%
EFFICIENCY (%)
70%
60%
50%
40%
30%
20%
10%
0%
1
10
100
1000
12VIN
42VIN
VOUT LOAD CURRENT (mA)
Figure 2. DC481 Typical Efficiency (T
A
= 25°C, V
OUT
= 3.3V)
VIN SUPPLY CURRENT W/ ZERO LOAD (
µ
A)
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
0
5 10 15 20 25 30 35 40 45 50 55 60
VIN (V)
Figure 3. DC481 Typical Supply Current (I
OUT
= 0A, T
A
= 25°C, V
OUT
= 3.3V)
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
