PD - 96903B
IRFB3507
IRFS3507
IRFSL3507
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
G
S
HEXFET
®
Power MOSFET
D
V
DSS
R
DS(on)
typ.
max.
I
D
75V
7.0m
:
8.8m
:
97A
GDS
TO-220AB
IRFB3507
GDS
D
2
Pak
IRFS3507
GDS
TO-262
IRFSL3507
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
97
69
390
190
1.3
± 20
5.0
-55 to + 175
300
10lb in (1.1N m)
280
See Fig. 14, 15, 16a, 16b
d
Units
A
W
W/°C
V
V/ns
°C
f
x
x
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Ã
e
g
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case
Case-to-Sink, Flat Greased Surface , TO-220
Junction-to-Ambient, TO-220
Junction-to-Ambient (PCB Mount) , D
2
Pak
k
Parameter
Typ.
–––
0.50
–––
–––
Max.
0.77
–––
62
40
Units
°C/W
k
jk
www.irf.com
1
01/20/06
IRFB3507/IRFS3507/IRFSL3507
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Input Resistance
Min. Typ. Max. Units
75
–––
–––
2.0
–––
–––
–––
–––
–––
––– –––
0.070 –––
7.0
8.8
–––
4.0
–––
20
––– 250
––– 200
––– -200
1.3
–––
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
mΩ V
GS
= 10V, I
D
= 58A
V V
DS
= V
GS
, I
D
= 100µA
µA V
DS
= 75V, V
GS
= 0V
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Ω
f = 1MHz, open drain
g
d
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
–––
88
24
36
20
81
52
49
3540
340
210
460
520
–––
130
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 50V, I
D
= 58A
I
D
= 58A
V
DS
= 60V
V
GS
= 10V
V
DD
= 48V
I
D
= 58A
R
G
= 5.6Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
V
GS
= 0V, V
DS
= 0V to 60V
86
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Effective Output Capacitance (Energy Related) –––
–––
Effective Output Capacitance (Time Related)
g
g
ns
pF
h
i
, See Fig.11
h
, See Fig. 5
D
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
–––
–––
97
Conditions
MOSFET symbol
showing the
integral reverse
G
S
A
A
Ãd
390
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
––– –––
1.3
V
–––
37
56
ns
–––
45
68
–––
32
48
nC
T
J
= 125°C
–––
51
77
–––
1.7
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 58A, V
GS
= 0V
T
J
= 25°C
V
R
= 64V,
T
J
= 125°C
I
F
= 58A
di/dt = 100A/µs
T
J
= 25°C
g
g
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 75A.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.17mH,
R
G
= 25Ω, I
AS
= 58A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
58A, di/dt
≤
390A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
2
www.irf.com
IRFB3507/IRFS3507/IRFSL3507
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
4.5V
10
4.5V
1
≤
60µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
≤
60µs PULSE WIDTH
Tj = 175°C
1
0.1
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
Fig 2.
Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 97A
VGS = 10V
2.0
ID, Drain-to-Source Current
(Α)
100
T J = 175°C
10
1.5
T J = 25°C
1
VDS = 25V
≤60µs
PULSE WIDTH
0.1
2
4
6
8
10
1.0
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 58A
VGS, Gate-to-Source Voltage (V)
10.0
VDS= 60V
VDS= 38V
VDS= 15V
C, Capacitance(pF)
10000
Ciss
8.0
6.0
1000
Coss
Crss
4.0
2.0
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0.0
0
20
40
60
80
100
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB3507/IRFS3507/IRFSL3507
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD, Reverse Drain Current (A)
100
T J = 175°C
ID, Drain-to-Source Current (A)
1000
100µsec
100
1msec
10
10msec
1
DC
0.1
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
100
1000
10
T J = 25°C
1
VGS = 0V
0.1
0.0
0.4
0.8
1.2
1.6
2.0
VSD, Source-to-Drain Voltage (V)
0.01
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode Forward Voltage
100
Limited By Package
80
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
95
90
60
85
40
80
20
75
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
70
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
1.6
Fig 10.
Drain-to-Source Breakdown Voltage
1200
EAS , Single Pulse Avalanche Energy (mJ)
1.4
1.2
1000
ID
TOP
8.9A
12A
BOTTOM 58A
Energy (µJ)
1.0
0.8
0.6
0.4
0.2
0.0
0
10
20
30
40
50
60
70
80
800
600
400
200
0
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
4
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IRFB3507/IRFS3507/IRFSL3507
10
Thermal Response ( Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
τ
C
τ
Ri (°C/W)
τi
(sec)
0.2963 0.000504
0.4738
0.013890
0.01
τ
1
τ
2
Ci=
τi/Ri
Ci= i/Ri
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
1
0.0001
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
300
EAR , Avalanche Energy (mJ)
250
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 58A
200
150
100
50
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as neither T
jmax
nor
Iav (max) is exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Starting T J , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy vs. Temperature
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