Final Electrical Specifications
LT1308
Single Cell High Current
Micropower 600kHz
Boost DC/DC Converter
January 1998
FEATURES
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DESCRIPTION
The LT
®
1308 is a micropower, fixed frequency boost
DC/DC converter that operates from an input voltage as
low as 1V. Capable of delivering 5V at load current of 1A
from a single Li-Ion cell, the LT1308 also features power
saving Burst Mode operation at light loads. High efficiency
is maintained over a broad 1mA to 1A load range.
The device contains a low-battery detector with a 200mV
reference and shuts down to less than 5µA quiescent
current. No-load quiescent current is 100µA and the
internal NPN power switch handles a 2A current with a
voltage drop of just 300mV.
High frequency 600kHz switching allows the use of small,
surface mount components. The LT1308’s current mode
architecture provides fast response to load and line varia-
tions. The device is available in an 8-lead SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
5V at 1A from a Single Li-Ion Cell
3.3V at 300mA from a Single NiCd Cell
Low Quiescent Current: 100µA
Operates with V
IN
as Low as 1V
Fixed Frequency Operation: 600kHz
Current Mode PWM Delivers Low Output Ripple
Guaranteed Start-Up into Full Load
Low Shutdown Current: 3µA
Low-Battery Comparator
Automatic Burst Mode
TM
Operation at Light Load
Low V
CESAT
Switch: 300mV at 2A
APPLICATIONS
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GSM Terminals
Digital Cameras
Answer-Back Pagers
Cordless Telephones
DECT Phones
GPS Receivers
Battery Backup Supplies
TYPICAL APPLICATION
4.2V TO 3V
Converter Efficiency
95
SHDN
LBI
LT1308
Li-Ion
CELL
C1
10µF
LBO
V
C
R
C
47k
C
C
22nF
C1: CERAMIC
C2: AVX TPS SERIES
D1: INTERNATIONAL RECTIFIER 10BQ015
L1: COILTRONICS CTX5-1
COILCRAFT DO3316-472
V
IN
SW
R1
301k
FB
GND
R2
100k
L1
4.7µH
EFFICIENCY (%)
90
85
80
D1
5V
1A
+
C2
100µF
75
70
1308F01
65
1
Figure 1. Single Li-Ion Cell to 5V/1A DC/DC Converter
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
U
U
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 3V
10
100
LOAD CURRENT (mA)
1000
1308 F01a
1
LT1308
ABSOLUTE
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V
C
1
FB 2
SHDN 3
GND 4
8
7
6
5
LBO
LBI
V
IN
SW
V
IN
, SHDN, LBO Voltage ......................................... 10V
SW Voltage ............................................................. 30V
FB Voltage ....................................................... V
IN
+ 1V
V
C
Voltage ................................................................ 2V
LBI Voltage ............................................ 0V
≤
V
LBI
≤
1V
Current into FB Pin ..............................................
±1mA
Junction Temperature ...........................................125°C
Operating Temperature Range
Commercial (Note 1) ......................... – 20°C to 70°C
Industrial ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LT1308CS8
LT1308IS8
S8 PART MARKING
1308
1308I
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 80°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
Commercial Grade 0°C to 70°C. V
IN
= 1.1V, V
SHDN
= V
IN
, T
A
= 25°C, unless otherwise noted.
SYMBOL
I
Q
V
FB
I
B
PARAMETER
Quiescent Current
Feedback Voltage
FB Pin Bias Current (Note 2)
Reference Line Regulation
V
FB
= V
REF
1.1V
≤
V
IN
≤
2V (25°C, 0°C)
1.1V
≤
V
IN
≤
2V (70°C)
2V
≤
V
IN
≤
6V
CONDITIONS
Not Switching
V
SHDN
= 0V
q
q
q
q
MIN
TYP
80
1
MAX
160
3
1.24
80
1.1
1.5
0.8
1
6
UNITS
µA
µA
V
nA
%/V
%/V
%/V
V
V
µmhos
V/V
V/V
1.20
1.22
27
0.6
q
0.3
0.92
1
40
100
80
Minimum Input Voltage
Input Voltage Range
g
m
A
V
f
OSC
Error Amp Transconductance
Error Amp Voltage Gain
Switching Frequency
Maximum Duty Cycle
Switch Current Limit (Note 3)
Switch V
CESAT
Burst Mode Operation Switch Current Limit
Shutdown Pin Current
DC = 40%
DC = 80%
I
SW
= 2A (25°C, 0°C)
I
SW
= 2A (70°C)
L = 3.3µH, V
OUT
= 3.3V, V
IN
= 1.2V
V
SHDN
= 1.1V
V
SHDN
= 6V
V
SHDN
= 0V
I
SINK
= 10µA
V
LBI
= 250mV, V
LBO
= 5V
V
LBI
= 150mV
q
q
q
q
q
q
q
∆I
= 5µA
25°C, 0°C
70°C
q
q
q
500
80
2.0
1.6
600
88
2.5
2
300
330
200
2.5
13
– 1.5
700
95
350
400
4.0
26
– 2.5
220
0.25
0.1
30
LBI Threshold Voltage
LBO Output Low
LBO Leakage Current
LBI Input Bias Current (Note 4)
180
200
0.1
0.01
5
2
U
kHz
%
A
A
mV
mV
mA
µA
µA
µA
mV
V
µA
nA
W
U
U
W W
W
LT1308
ELECTRICAL CHARACTERISTICS
Commercial Grade 0°C to 70°C. V
IN
= 1.1V, V
SHDN
= V
IN
, T
A
= 25°C unless otherwise noted.
SYMBOL
PARAMETER
Low-Battery Detector Gain
Switch Leakage Current
Reverse Battery Current
CONDITIONS
1MΩ Load (25°C, 0°C)
1MΩ Load (70°C)
V
SW
= 5V
(Note 5)
q
MIN
1000
500
TYP
3000
0.01
750
MAX
UNITS
V/V
V/V
10
µA
mA
Commercial Grade T
A
= – 20°C, V
IN
= 1.1V, V
SHDN
= V
IN
, unless otherwise noted (Note 1).
SYMBOL
I
Q
V
FB
g
m
A
V
f
OSC
PARAMETER
Quiescent Current
Feedback Voltage
Error Amp Transconductance
Error Amp Voltage Gain
Switching Frequency
Maximum Duty Cycle
Switch V
CESAT
Shutdown Pin Current
LBI Threshold Voltage
I
SW
= 2A, V
IN
= 1.2V
V
SHDN
= V
IN
V
SHDN
= 0V
180
500
∆I
= 5µA
CONDITIONS
V
FB
= 1.3V, Not Switching
V
SHDN
= 0V
1.195
MIN
TYP
80
1
1.22
35
100
600
88
300
2.5
– 1.5
200
350
4.0
– 2.5
220
750
MAX
160
3
1.245
UNITS
µA
µA
V
µmhos
V/V
kHz
%
mV
µA
µA
mV
Industrial Grade – 40°C to 85°C. V
IN
= 1.2V, V
SHDN
= V
IN
, T
A
= 25°C, unless otherwise noted.
SYMBOL
I
Q
V
FB
I
B
PARAMETER
Quiescent Current
Feedback Voltage
FB Pin Bias Current (Note 2)
Reference Line Regulation
V
FB
= V
REF
1.1V
≤
V
IN
≤
2V (– 40°C)
1.1V
≤
V
IN
≤
2V (85°C)
2V
≤
V
IN
≤
6V
CONDITIONS
Not Switching
V
SHDN
= 0V
q
q
q
q
MIN
TYP
80
1
MAX
160
3
1.245
80
1.1
1.5
0.8
1.2
6
UNITS
µA
µA
V
nA
%/V
%/V
%/V
V
V
µmhos
V/V
V/V
1.195
1.22
27
0.6
q
0.3
1.2
40
100
80
500
500
80
75
600
600
88
2.5
2
300
330
200
Minimum Input Voltage (– 40°C)
Input Voltage Range
g
m
A
V
f
OSC
Error Amp Transconductance
Error Amp Voltage Gain
Switching Frequency
Maximum Duty Cycle
Switch Current Limit (Note 3)
Switch V
CESAT
Burst Mode Operation Switch Current Limit
∆I
= 5µA
– 40°C
85°C
V
IN
= 1.3V (– 40°C)
V
IN
= 1.3V (85°C)
– 40°C
85°C
DC = 40%
DC = 80%
I
SW
= 2A (– 40°C)
I
SW
= 2A (85°C)
L = 3.3µH, V
OUT
= 3.3V
q
q
750
750
95
kHz
kHz
%
%
A
A
2.0
1.6
350
400
mV
mV
mA
3
LT1308
ELECTRICAL CHARACTERISTICS
Industrial Grade – 40°C to 85°C. V
IN
= 1.2V, V
SHDN
= V
IN
, T
A
= 25°C, unless otherwise noted.
SYMBOL
PARAMETER
Shutdown Pin Current
CONDITIONS
V
SHDN
= 1.2V
V
SHDN
= 6V
V
SHDN
= 0V
I
SINK
= 10µA
V
LBI
= 250mV, V
LBO
= 5V
V
LBI
= 150mV
1MΩ Load (–40°C)
1MΩ Load (85°C)
V
SW
= 5V
q
q
q
q
q
q
q
q
MIN
TYP
2.5
13
– 1.5
MAX
4.0
26
– 2.5
220
0.25
0.1
30
UNITS
µA
µA
µA
mV
V
µA
nA
V/V
V/V
LBI Threshold Voltage
LBO Output Low
LBO Leakage Current
LBI Input Bias Current (Note 4)
Low-Battery Detector Gain
Switch Leakage Current
180
200
0.1
0.01
5
1000
300
3000
0.01
10
µA
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
C grade device specifications are guaranteed over the 0°C to 70°C
temperature range. In addition, C grade device specifications are assured
over the –40°C to 85°C temperature range by design or correlation, but
are not production tested.
Note 2:
Bias current flows into FB pin.
Note 3:
Switch current limit guaranteed by design and/or correlation to
static tests. Duty cycle affects current limit due to ramp generator (see
Block Diagram).
Note 4:
Bias current flows out of LBI pin.
Note 5:
The LT1308 will withstand continuous application of 1.6V applied
to GND pin while V
IN
and SW are grounded.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency
90
85
80
EFFICIENCY (%)
V
IN
= 1.2V
V
OUT
= 3.3V
R1 = 169k
SWITCH V
CESAT
(mV)
75
70
65
60
55
50
1
10
100
LOAD CURRENT (mA)
1000
1308 G01
PIN FUNCTIONS
V
C
(Pin 1):
Compensation Pin for Error Amplifier. Con-
nect a series RC from this pin to ground. Typical values
are 47kΩ and 22nF. Minimize trace area at V
C
.
FB (Pin 2):
Feedback Pin. Reference voltage is 1.22V.
Connect resistive divider tap here. Minimize trace area at
FB. Set V
OUT
according to: V
OUT
= 1.22V(1 + R1/R2).
SHDN (Pin 3):
Shutdown. Ground this pin to turn off
switcher. Must be tied to V
IN
(or higher voltage) to enable
switcher. Do not float the SHDN pin.
GND (Pin 4):
Ground. Connect directly to local ground
plane. Ground plane should enclose all components
associated with the LT1308.
4
U W
Transient Response
500
V
OUT
200mV/DIV
AC COUPLED
100mA
5mA
500µs/DIV
V
IN
= 1.2V
V
OUT
= 5V
C2 = 22µF
R
C
, C
C
= 47k, 6.8nF
L = 4.7µH
1308 G02
Switch Saturation Voltage vs
Current
400
85°C
300
25°C
–40°C
I
LOAD
200
100
0
0
1.0
0.5
1.5
SWITCH CURRENT (A)
2.0
1308 G03
U
U
U
LT1308
PIN FUNCTIONS
SW (Pin 5):
Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
V
IN
(Pin 6):
Supply Pin. Must have local bypass capacitor
right at the pin, connected directly to ground.
LBI (Pin 7):
Low-Battery Detector Input. 200mV refer-
ence. Voltage on LBI must stay between ground and
700mV. Low-battery detector does not function with
SHDN pin grounded. If not used, float LBI pin.
LBO (Pin 8):
Low-Battery Detector Output. Open collec-
tor, can sink 10µA. A 1MΩ pullup is recommended. LBO
is high impedance when SHDN is grounded.
BLOCK DIAGRAM
V
IN
6
R5
40k
V
OUT
R1
(EXTERNAL)
FB
R2
(EXTERNAL)
FB
2
R4
140k
RAMP
GENERATOR
600kHz
OSCILLATOR
APPLICATIONS INFORMATION
LAYOUT HINTS
The LT1308 switches current at high speed, mandating
careful attention to layout for proper performance.
You will
not get advertised performance with careless layouts.
Figure 2 shows recommended component placement.
Follow this closely in your PC layout. Note the direct path
of the switching loops. Input capacitor C
IN
must
be placed
close (< 5mm) to the IC package. As little as 10mm of wire
or PC trace from C
IN
to V
IN
will cause problems such as
inability to regulate or oscillation. A 10µF ceramic bypass
capacitor is the only input capacitance required
provided
the battery has a low inductance path to the circuit.
The
battery itself provides the bulk capacitance the device
requires for proper operation. If the battery is located some
Figure 2. Recommended Component Placement. Traces
Carrying High Current Are Direct. Trace Area at FB Pin and V
C
Pin is Kept Low. Lead Length to Battery Should Be Kept Short.
Ground Plane Should Be Placed Under All Components
+
+
Σ
+
–
U
W
W
U
U
U
U
U
V
IN
R6
40k
SHDN
+
g
m
V
C
1
LBI
ERROR
AMPLIFIER
BIAS
SHUTDOWN
3
–
Q1
Q2
×10
R3
30k
+
ENABLE
7
+
–
A4
LBO
8
–
A1
COMPARATOR
200mV
SW
FF
R
Q
S
DRIVER
5
Q3
A2
+
A=3
0.03Ω
–
4
GND
1308 BD
GROUND PLANE
1
2
3
4
LT1308
8
7
6
5
L
V
IN
MULTIPLE
VIAs
C
IN
C
OUT
GND
D
V
OUT
1308 F02
5
FPGA/CPLD
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