74LVT02
3.3 V Quad 2-input NOR gate
Rev. 3 — 7 April 2017
Product data sheet
1
General description
The 74LVT02 is a high-performance BiCMOS product designed for V
CC
operation at
3.3 V.
The 74LVT02 is a quad 2-input NOR gate.
2
Features and benefits
•
•
•
•
Wide supply voltage range from 2.7 V to 3.6 V
Output capability: +64 mA and -32 mA
TTL input and output switching levels
Latch-up protection
–
JESD78 Class II exceeds 500 mA
•
Complies with JEDEC standards:
–
JESD8C (2.7 V to 3.6 V)
•
ESD protection:
–
HBM JESD22-A114E exceeds 2000 V
–
MM JESD22-A115-A exceeds 200 V
•
Specified from -40 °C to 85 °C
3
Ordering information
Package
Temperature
range
-40 °C to +85 °C
-40 °C to +85 °C
-40 °C to +85 °C
Table 1. Ordering information
Type
number
74LVT02D
74LVT02DB
74LVT02PW
Name
SO14
SSOP14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT337-1
SOT402-1
Nexperia
3.3 V Quad 2-input NOR gate
74LVT02
4
Functional diagram
2
3
5
6
8
9
11
12
1A
1B
2A
2B
3A
3B
4A
4B
2
1Y
2Y
3Y
4Y
mna216
1
4
10
13
3
5
6
8
9
11
12
≥1
1
≥1
4
≥1
10
A
Y
B
mna215
≥1
13
001aah084
Figure 1. Logic symbol
Figure 2. IEC logic symbol
Figure 3. Logic diagram (one gate)
5
Pinning information
5.1 Pinning
74LVT02
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
aaa-026557
14 V
CC
13 4Y
12 4B
11 4A
10 3Y
9
8
3B
3A
74LVT02
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
aaa-026558
14 V
CC
13 4Y
12 4B
11 4A
10 3Y
9
8
3B
3A
Figure 4. Pin configuration for SOT108-1 (SO14)
Figure 5. Pin configuration for SOT337-1 and SOT402-1
(SSOP14 and TSSOP14)
5.2 Pin description
Table 2. Pin description
Symbol
1Y to 4Y
1A to 4A
1B to 4B
GND
V
CC
Pin
1, 4, 10, 13
2, 5, 8, 11
3, 6, 9,12
7
14
Description
data output
data input
data input
ground (0 V)
supply voltage
74LVT02
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 7 April 2017
2 / 13
Nexperia
3.3 V Quad 2-input NOR gate
74LVT02
6
Functional description
[1]
Table 3. Function table
Input
nA
L
L
H
H
[1]
H = HIGH voltage level; L = LOW voltage level
Output
nB
L
H
L
H
nY
H
L
L
L
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
j
P
tot
[1]
[2]
[3]
Conditions
[1]
Min
-0.5
-0.5
-0.5
-50
-50
-
-32
-65
[2]
Max
+4.6
+7.0
+7.0
-
-
64
-
+150
150
500
Unit
V
V
V
mA
mA
mA
mA
°C
°C
mW
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
storage temperature
junction temperature
total power dissipation
T
amb
= -40 to +85 °C
[3]
output in OFF-state or HIGH-state
V
I
< 0 V
V
O
< 0 V
output in LOW-state
output in HIGH-state
[1]
-
-
The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which
are detrimental to reliability.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
8
Recommended operating conditions
Conditions
Min
2.7
0
-20
-
in free-air
outputs enabled
Rev. 3 — 7 April 2017
Table 5. Operating conditions
Symbol Parameter
V
CC
V
I
I
OH
I
OL
T
amb
Δt/ΔV
74LVT02
Typ
-
-
-
-
-
-
Max
3.6
5.5
-
32
+85
10
Unit
V
V
mA
mA
°C
ns/V
supply voltage
input voltage
HIGH-level output current
LOW-level output current
ambient temperature
input transition rise and fall rate
-40
-
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
3 / 13
Nexperia
3.3 V Quad 2-input NOR gate
74LVT02
9
Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= -40 °C to +85 °C
V
IK
V
IH
V
IL
V
OH
input clamping voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level output
voltage
Conditions
V
CC
= 2.7 V; I
IK
= -18 mA
Min
-1.2
2.0
-
Typ
[1]
Max
-
Unit
V
V
V
V
V
V
V
V
V
μA
μA
μA
-
-
-
-
-
0.8
-
-
-
0.2
0.5
0.5
V
CC
= 2.7 V to 3.6 V; I
OH
= -100 μA
V
CC
= 2.7 V; I
OH
= -6 mA
V
CC
= 3.0 V; I
OH
= -20 mA
V
CC
- 0.2
2.4
2.0
-
-
-
-
-
-
V
OL
LOW-level output voltage V
CC
= 2.7 V; I
OL
= 100 μA
V
CC
= 2.7 V; I
OL
= 24 mA
V
CC
= 3.0 V; I
OL
= 32 mA
I
I
I
OFF
I
CC
input leakage current
power-off leakage
current
supply current
V
CC
= 0 V or 3.6 V; V
I
= 5.5 V
V
CC
= 3.6 V; V
I
= V
CC
or GND
V
CC
= 0 V; V
I
or V
O
= 0 V to 4.5 V
V
CC
= 3.6 V; V
I
= GND or V
CC
; I
O
= 0 A
output HIGH
output LOW
10
±1
±100
-
-
[2]
-
1
0.02
2
0.2
mA
mA
μA
ΔI
CC
additional supply current
per input pin; V
CC
= 3.0 V to 3.6 V;
one input at V
CC
- 0.6 V
and other inputs at V
CC
or GND
V
I
= 0 V or 3.0 V
-
C
I
[1]
[2]
input capacitance
-
3
-
pF
Typical values are measured at T
amb
= 25 °C and V
CC
= 3.3 V.
This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND.
74LVT02
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 7 April 2017
4 / 13
Nexperia
3.3 V Quad 2-input NOR gate
74LVT02
10 Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see
Figure 7.
Symbol Parameter
T
amb
= -40 °C to +85 °C
t
PLH
LOW to HIGH
propagation delay
Conditions
nA or nB to nY; see
Figure 6
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
Min
Typ
[1]
Max
Unit
-
1
-
2.8
5.2
4.4
ns
ns
t
PHL
HIGH to LOW
propagation delay
nA or nB to nY; see
Figure 6
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
-
1
-
2.6
3.4
3.6
ns
ns
[1]
Typical values are measured at T
amb
= 25 °C and V
CC
= 3.3 V.
10.1 Waveforms and test circuit
V
I
A, B input
GND
t
PHL
V
OH
Y output
V
OL
V
M
mna612
V
M
t
PLH
Measurement points are given in
Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Figure 6. Input to output propagation delays
Table 8. Measurement points
Input
V
M
1.5 V
Output
V
I
2.7 V
V
M
1.5 V
74LVT02
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 7 April 2017
5 / 13
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