LTC6362C/LTC6362I............................–40°C to 85°C
LTC6362H .......................................... –40°C to 125°C
Specified Temperature Range (Note 5)
LTC6362C ................................................ 0°C to 70°C
LTC6362I .............................................–40°C to 85°C
LTC6362H .......................................... –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
–IN 1
V
OCM
2
V
+
3
+OUT 4
8
7
6
5
+IN
SHDN
V
–
–OUT
–IN 1
V
OCM
2
V
+
3
9
V
–
+OUT 4
8
7
6
5
+IN
SHDN
V
–
–OUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 273°C/W,
θ
JC
= 45°C/W
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 39.7°C/W,
θ
JC
= 45°C/W
EXPOSED PAD (PIN 9) IS V
–
, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC6362CMS8#PBF
LTC6362IMS8#PBF
LTC6362HMS8#PBF
LTC6362CDD#PBF
LTC6362IDD#PBF
LTC6362HDD#PBF
TAPE AND REEL
LTC6362CMS8#TRPBF
LTC6362IMS8#TRPBF
LTC6362HMS8#TRPBF
LTC6362CDD#TRPBF
LTC6362IDD#TRPBF
LTC6362HDD#TRPBF
PART MARKING*
LTGCN
LTGCN
LTGCN
LGCM
LGCM
LGCM
PACKAGE DESCRIPTION
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead (3mm
×
3mm) Plastic DFN
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
6362fa
2
LTC6362
ELECTRICAL CHARACTERISTICS
SYMBOL
V
OSDIFF
(Note 6)
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 5V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= 2.5V, V
SHDN
= open. V
S
is defined
as (V
+
– V
–
). V
OUTCM
is defined as (V
+OUT
+ V
–OUT
)/2. V
ICM
is defined as (V
+IN
+ V
–IN
)/2. V
OUTDIFF
is defined as (V
+OUT
– V
–OUT
).
PARAMETER
Differential Offset Voltage (Input Referred)
CONDITIONS
V
S
= 3V
V
ICM
=1.5V
l
MIN
TYP
50
65
MAX
200
350
250
600
200
350
260
600
2.5
2.5
±350
±500
±350
±850
±260
±460
±350
±850
UNITS
µV
µV
µV
µV
µV
µV
µV
µV
µV/°C
µV/°C
nA
nA
nA
nA
nA
nA
nA
nA
nA/°C
nA/°C
nA
nA
nA
nA
nA
nA
nA
nA
MΩ
kΩ
pF
nV/√Hz
pA/√Hz
nV/√Hz
V
V
dB
dB
dB
dB
dB
dB
V
ICM
= 2.75V
l
V
S
= 5V
V
ICM
= 2.5V
l
50
75
l
l
l
V
ICM
= 4.5V
∆V
OSDIFF
/∆T (Note 7) Differential Offset Voltage Drift (Input Referred) V
S
= 3V
V
S
= 5V
Input Bias Current
V
S
= 3V
I
B
(Note 8)
V
ICM
=1.5V
V
ICM
= 2.5V
l
0.9
0.9
±100
l
±75
±75
l
V
S
= 5V
V
ICM
= 2.5V
V
ICM
= 4.5V
l
±75
l
l
∆I
B
/∆T
I
OS
(Note 8)
Input Bias Current Drift
Input Offset Current
V
S
= 3V
V
S
= 5V
V
S
= 3V
V
ICM
=1.5V
V
ICM
= 2.5V
1.1
0.9
±75
±325
±650
±425
±1200
±325
±500
±425
±1200
l
±125
l
V
S
= 5V
V
ICM
=2.5V
l
±75
±125
l
V
ICM
= 4.5V
R
IN
C
IN
e
n
i
n
e
nvocm
V
ICMR
(Note 9)
CMRRI (Note 10)
CMRRIO (Note 10)
PSRR (Note 11)
PSRRCM (Note 11)
Input Resistance
Input Capacitance
Differential Input Noise Voltage Density
Input Noise Current Density
Common Mode Noise Voltage Density
Input Common Mode Range
Common Mode
Differential Mode
Differential Mode
f = 100kHz, Not Including R
I
/R
F
Noise
f = 100kHz, Not Including R
I
/R
F
Noise
f = 100kHz
V
S
= 3V
V
S
= 5V
V
S
= 3V, V
ICM
from 0V to 3V
V
S
= 5V, V
ICM
from 0V to 5V
V
S
= 3V, V
OCM
from 0.5V to 2.5V
V
S
= 5V, V
OCM
from 0.5V to 4.5V
V
S
= 2.8V to 5.25V
14
32
2
3.9
0.8
14.3
l
l
l
l
l
l
l
l
Input Common Mode Rejection Ratio
(Input Referred)
∆V
ICM
/∆V
OSDIFF
Output Common Mode Rejection Ratio
(Input Referred)
∆V
OCM
/∆V
OSDIFF
Differential Power Supply Rejection
(∆V
S
/∆V
OSDIFF
)
Output Common Mode Power Supply Rejection V
S
= 2.8V to 5.25V
(∆V
S
/∆V
OSCM
)
0
0
70
73
75
55
80
58
3
5
95
98
100
90
105
72
6362fa
3
LTC6362
ELECTRICAL CHARACTERISTICS
SYMBOL
GCM
∆GCM
BAL
PARAMETER
Common Mode Gain (∆V
OUTCM
/∆V
OCM
)
Common Mode Gain Error 100 • (GCM – 1)
Output Balance (∆V
OUTCM
/∆V
OUTDIFF
)
Open-Loop Voltage Gain
Common Mode Offset Voltage
(V
OUTCM
– V
OCM
)
Common Mode Offset Voltage Drift
Output Signal Common Mode Range
(Voltage Range for the V
OCM
Pin)
Self-Biased Voltage at the V
OCM
Pin
Input Resistance, V
OCM
Pin
Output Voltage, High, Either Output Pin
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 5V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= 2.5V, V
SHDN
= open. V
S
is defined
as (V
+
– V
–
). V
OUTCM
is defined as (V
+OUT
+ V
–OUT
)/2. V
ICM
is defined as (V
+IN
+ V
–IN
)/2. V
OUTDIFF
is defined as (V
+OUT
– V
–OUT
).
CONDITIONS
V
S
= 3V, V
OCM
from 0.5V to 2.5V
V
S
= 5V, V
OCM
from 0.5V to 4.5V
V
S
= 3V, V
OCM
from 0.5V to 2.5V
V
S
= 5V, V
OCM
from 0.5V to 4.5V
∆V
OUTDIFF
= 2V
Single-Ended Input
Differential Input
V
S
= 3V
V
S
= 5V
V
OCM
Driven Externally, V
S
= 3V
V
OCM
Driven Externally, V
S
= 5V
V
OCM
Not Connected, V
S
= 3V
V
OCM
Not Connected, V
S
= 5V
MIN
l
l
l
l
l
l
TYP
1
1
±0.07
±0.07
–57
–57
95
±6
±6
45
MAX
±0.16
±0.4
–35
–35
±30
±30
2.5
4.5
1.525
2.525
230
UNITS
V/V
V/V
%
%
dB
dB
dB
mV
mV
μV/°C
V
V
V
V
kΩ
V
V
V
V
V
V
V
V
mA
mA
V/μs
MHz
MHz
MHz
dBc
dBc
dBc
ns
ns
ns
ns
ns
ns
ns
ns
V
mA
mA
µA
mA
mA
µA
A
VOL
V
OSCM
∆V
OSCM
/∆T
V
OUTCMR
(Note 9)
V
OCM
R
INVOCM
V
OUT
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
I
SC
SR
GBWP
f
–3dB
HD2/HD3
t
s
I
L
= 0mA, V
S
= 3V
I
L
= –5mA, V
S
= 3V
I
L
= 0mA, V
S
= 5V
I
L
= –5mA, V
S
= 5V
Output Voltage, Low , Either Output Pin
I
L
= 0mA, V
S
= 3V
I
L
= 5mA, V
S
= 3V
I
L
= 0mA, V
S
= 5V
I
L
= 5mA, V
S
= 5V
Output Short-Circuit Current, Either Output Pin V
S
= 3V
V
S
= 5V
Slew Rate
Differential 8V
P-P
Output
Gain-Bandwidth Product
f
TEST
= 200kHz
–3dB Bandwidth
2nd/3rd Order Harmonic Distortion
Single-Ended Input
Settling Time to a 2V
P-P
Output Step
R
I
= R
F
= 1k
f = 1kHz, V
OUT
= 8V
P-P
f = 10kHz, V
OUT
= 8V
P-P
f = 100kHz, V
OUT
= 8V
P-P
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
0.1%
0.01%
0.0015% (16-Bit)
4ppm (18-Bit)
0.5
0.5
1.475
2.475
110
2.85
2.75
4.8
4.7
13
15
145
90
1.5
2.5
170
2.93
2.85
4.93
4.85
0.05
0.13
0.05
0.13
25
35
45
180
34
–120/–116
–106/–103
–84/–76
160
180
230
440
230
300
460
550
0.15
0.3
0.2
0.4
l
Settling Time to a 8V
P-P
Output Step
V
S
(Note 12)
I
S
Supply Voltage Range
Supply Current
l
2.8
0.9
V
S
= 3V, Active
l
V
S
= 3V, Shutdown
V
S
= 5V, Active
V
S
= 5V, Shutdown
l
l
l
55
1
70
5.25
0.96
1.05
130
1.06
1.18
140
6362fa
4
LTC6362
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IL
V
IH
t
ON
t
OFF
PARAMETER
SHDN
Input Logic Low
SHDN
Input Logic High
Turn-On Time
Turn-Off Time
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 5V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= 2.5V, V
SHDN
= open. V
S
is defined
as (V
+
– V
–
). V
OUTCM
is defined as (V
+OUT
+ V
–OUT
)/2. V
ICM
is defined as (V
+IN
+ V
–IN
)/2. V
OUTDIFF
is defined as (V
+OUT
– V
–OUT
).
CONDITIONS
l
l
MIN
2
TYP
MAX
0.8
2
2
UNITS
V
V
μs
μs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Input pins (+IN, –IN, V
OCM
and
SHDN)
are protected by steering
diodes to either supply. If the inputs should exceed either supply voltage,
the input current should be limited to less than 10mA. In addition, the
inputs +IN, –IN are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1.4V, the input current should be limited
to less than 10mA.
Note 3:
A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4:
The LTC6362C and LTC6362I are guaranteed functional over
the operating temperature range of –40°C to 85°C. The LTC6362H is
guaranteed functional over the operating temperature range of –40°C to
125°C.
Note 5:
The LTC6362C is guaranteed to meet specified performance from
0°C to 70°C.The LTC6362I is guaranteed to meet specified performance
from –40°C to 85°C. The LTC6362C is designed, characterized and
expected to meet specified performance from –40°C to 85°C, but is not
tested or QA sampled at these temperatures. The LTC6362H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 6:
Differential input referred offset voltage includes offset due to
input offset current across 1k source resistance.
Note 7:
Maximum differential input referred offset voltage drift is
determined by a large sampling of typical parts. Drift is not guaranteed by
test or QA sampled at this value.
Note 8:
Input bias current is defined as the maximum of the input currents
flowing into either of the input pins (–IN and +IN). Input Offset current is
defined as the difference between the input currents (I
OS
= I
B+
– I
B–
).
Note 9:
Input common mode range is tested by verifying that at the limits
stated in the Electrical Characteristics table, the differential offset (V
OSDIFF
)
and common mode offset (V
OSCM
) have not deviated by more than ±1mV
and ±35mV respectively compared to the V
ICM
= 2.5V (at V
S
= 5V) and
V
ICM
= 1.5V (at V
S
= 3V) cases.
Output common mode range is tested by verifying that at the limits stated
in the Electrical Characteristics table, the common mode offset (V
OSCM
)
has not deviated by more than ±15mV compared to the V
OCM
= 2.5V
(at V
S
= 5V) and V
OCM
= 1.5V (at V
S
= 3V) cases.
Note 10:
Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins +IN or –IN to the change in differential
input referred offset voltage. Output CMRR is defined as the ratio of
the change in the voltage at the V
OCM
pin to the change in differential
input referred offset voltage. This specification is strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs and it is difficult to measure actual amplifier performance (see
Effects of Resistor Pair Mismatch in the Applications Information section
of this data sheet). For a better indicator of actual amplifier performance
independent of feedback component matching, refer to the PSRR
specification.
Note 11:
Differential power supply rejection (PSRR) is defined as the
ratio of the change in supply voltage to the change in differential input
referred offset voltage. Common mode power supply rejection (PSRRCM)
is defined as the ratio of the change in supply voltage to the change in the
common mode offset voltage.
Note 12:
Supply voltage range is guaranteed by power supply rejection
国际半导体设备材料产业协会（SEMI）昨（10）日公布半导体设备资本支出的年中预测报告（SEMI Capital Equipment Forecast），预估2012年全球半导体设备营收规模将达到423.8亿美元，2013年将成长至467.1亿美元。
受惠平板电脑、智慧型手机与行动装置等消费性电子商品亮丽表现，半导体设备的采购需求仍将持续。SEMI在报告中指出，2011年半...[详细]
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
