ST7L15, ST7L19
8-bit MCU for automotive with single voltage Flash/ROM memory,
data EEPROM, ADC, 5 timers, SPI
PRELIMINARY DATA
Features
■
■
■
■
Memories
– 4 Kbytes single voltage extended Flash
(XFlash) or ROM with readout protection, In-
Circuit programming and In-Application Pro-
gramming (ICP and IAP), 10K write/erase cy-
cles guaranteed, data retention 20 years at
55°C
– 256 bytes RAM
– 128 bytes data E2PROM with readout protec-
tion, 300K write/erase cycles guaranteed,
data retention 20 years at 55°C
Clock, Reset and Supply Management
– Enhanced reset system
– Enhanced low voltage supervisor (LVD) for
main supply
– Clock sources: Internal 1% RC oscillator,
crystal/ceramic resonator or external clock
– Optional x4 or x8 PLL for 4 or 8 MHz internal
clock (only x8 PLL available for ROM devices)
– 5 power saving modes: Halt, Active Halt, Auto
Wake-Up from Halt, Wait and Slow
I/O Ports
– Up to 17 multifunctional bidirectional I/O lines
– 7 high sink outputs
5 Timers
– Configurable watchdog timer
– Two 8-bit Lite timers with prescaler, 1 realtime
base and 1 input capture
– Two 12-bit autoreload timers with 4 PWM out-
puts, 1 input capture, 1 pulse and 4 output
compare functions
SO20
300mil
■
■
■
■
■
Communication Interface
– SPI synchronous serial interface
Interrupt Management
– 12 interrupt vectors plus TRAP and RESET
– 15 external interrupt lines (on 4 vectors)
A/D Converter
– 7 input channels
– 10-bit precision
Instruction Set
– 8-bit data manipulation
– 63 basic instructions with illegal opcode de-
tection
– 17 main addressing modes
– 8 x 8 unsigned multiply instructions
Development Tools
– Full hardware/software development package
– DM (Debug Module)
Device Summary
Features
Program Memory - bytes
RAM (stack) - bytes
Data EEPROM - bytes
Peripherals
Operating Supply
CPU Frequency
Operating Temperature
Packages
ST7L15
4K
256 (128)
-
128
Lite Timer with Watchdog, Autoreload Timer, SPI, 10-bit ADC
3V to 5.5V
Up to 8 MHz (w/ext OSC up to 16 MHz and int 1 MHz RC 1%, PLLx8/4 MHz)
Up to -40 to +85°C / -40 to +125°C
SO20 300mil
ST7L19
Rev. 3
January 2007
1/138
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1
Table of Contents
1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 PARAMETRIC DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 DEBUG MODULE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 REGISTER AND MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 PROGRAMMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4 ICC INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5 MEMORY PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6 RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.7 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 DATA EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.3 MEMORY ACCESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.4 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.5 ACCESS ERROR HANDLING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.6 DATA EEPROM READOUT PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.7 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.3 CPU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7 SUPPLY, RESET AND CLOCK MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 INTERNAL RC OSCILLATOR ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2 PHASE LOCKED LOOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.3 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.4 MULTI-OSCILLATOR (MO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.5 RESET SEQUENCE MANAGER (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.6 SYSTEM INTEGRITY MANAGEMENT (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.1 NON MASKABLE SOFTWARE INTERRUPT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.2 EXTERNAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.3 PERIPHERAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
9 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.2 SLOW MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.3 WAIT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.4 HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9.5 ACTIVE HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
138
. 38
...
9.6 AUTO WAKE-UP FROM HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
10 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
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1
Table of Contents
10.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10.2 FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10.3 I/O PORT IMPLEMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.4 UNUSED I/O PINS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.5 LOW-POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.6 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
10.8 MULTIPLEXED INPUT/OUTPUT PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
11 ON-CHIP PERIPHERALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
11.1 WATCHDOG TIMER (WDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
11.2 DUAL 12-BIT AUTORELOAD TIMER 4 (AT4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
11.3 LITE TIMER 2 (LT2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
11.4 SERIAL PERIPHERAL INTERFACE (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
11.5 10-BIT A/D CONVERTER (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
12 INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.1 ST7 ADDRESSING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.2 INSTRUCTION GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
13 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
13.1 PARAMETER CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
13.2 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
13.3 OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
13.4 SUPPLY CURRENT CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
13.5 CLOCK AND TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
13.6 MEMORY CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
13.7 EMC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
13.8 I/O PORT PIN CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
13.9 CONTROL PIN CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
13.10 COMMUNICATION INTERFACE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . 120
13.11 10-BIT ADC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
14 PACKAGE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
14.1 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
14.2 SOLDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
15 DEVICE CONFIGURATION AND ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . 126
15.1 OPTION BYTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
15.2 DEVICE ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
15.3 DEVELOPMENT TOOLS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
15.4 ST7 APPLICATION NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
16 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
3/138
ST7L15, ST7L19
1 INTRODUCTION
1.1 DESCRIPTION
The ST7L1x is a member of the ST7 microcontrol-
ler family suitable for automotive applications. All
ST7 devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set.
The ST7L1 features Flash memory with byte-by-
byte In-Circuit Programming (ICP) and In-Applica-
tion Programming (IAP) capability.
Under software control, the ST7L1 device can be
placed in WAIT, SLOW or HALT mode, reducing
power consumption when the application is in idle
or standby state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
Figure 1. General Block Diagram
Int.
1% RC
1 MHz
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
1.2 PARAMETRIC DATA
For easy reference, all parametric data is located
in
section 13 on page 98.
1.3 DEBUG MODULE
The ST7L1 features an on-chip Debug Module
(DM) to support In-Circuit Debugging (ICD). For a
description of the DM registers, refer to the
ST7
ICC Protocol Reference Manual.
PLL x8
or PLL x4*
CLKIN
/2
OSC1
OSC2
Ext.
OSC
1 MHz
to
16 MHz
12-bit
AUTORELOAD
TIMER 4
8-bit
LITE TIMER 2
INTERNAL
CLOCK
LVD
ADDRESS AND DATA BUS
PORT A
PORT B
PORT C*
V
DD
V
SS
RESET
POWER
SUPPLY
CONTROL
8-bit CORE
ALU
PA7:0
(8 bits)
PB6:0
(7 bits)
PC1:0
(2 bits)
ADC
SPI
PROGRAM
MEMORY
(up to 4 Kbytes)
DEBUG MODULE
RAM
(256 bytes)
DATA EEPROM
(128 bytes)
WATCHDOG
*Note:
Not available on ROM devices.
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1
ST7L15, ST7L19
2 PIN DESCRIPTION
Figure 2. 20-Pin SO Package Pinout
V
SS
V
DD
RESET
SS/AIN0/PB0
SCK/AIN1/PB1
MISO/AIN2/PB2
MOSI/AIN3/PB3
CLKIN/AIN4/PB4
AIN5/PB5
AIN6/PB6
1
2
3
4
5
6
7
8
9
10
ei2
ei1
ei3
ei0
20
19
18
17
16
15
14
13
12
11
OSC1/CLKIN/PC0
2)
OSC2/PC1
2)
PA0 (HS)/LTIC
1)
PA1 (HS)/ATIC
PA2 (HS)/ATPWM0
PA3 (HS)/ATPWM1
PA4 (HS)/ATPWM2
PA5 (HS)/ATPWM3/ICCDATA
PA6/MCO/ICCCLK/BREAK
PA7 (HS)
(HS) 20mA High sink capability
eix associated external interrupt vector
Notes:
1. This pin cannot be configured as external interrupt in ROM devices.
2. OSC1 and OSC2 are not multiplexed in ROM devices and Port C is not present.
Legend / Abbreviations for
Table 1:
Type:
I = input, O = output, S = supply
In/Output level: C
T
= CMOS 0.3V
DD
/ 0.7V
DD
with input trigger
Output level:
HS = 20mA high sink (on N-buffer only)
Port and control configuration:
– Input:
float = floating, wpu = weak pull-up, int = interrupt, ana = analog
– Output:
OD = open drain, PP = push-pull
The RESET configuration of each pin (shown in bold) is valid as long as the device is in reset state.
Table 1. Device Pin Description
Pin No.
Type
Pin Name
SO20
1
2
3
V
SS
V
DD
RESET
Level
Output
Input
Port / Control
Input
float
wpu
ana
int
Output
OD
PP
Main
Function
(after
reset)
Ground
Main power supply
X
X
Top priority non maskable interrupt (active low)
Alternate Function
S
S
I/O C
T
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1
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