2.0 x 1.6mm Package (Option “A”)
0.079±0.002
2.00±0.05
#4
#3
0.063±0.002
1.60±0.05
Recommended Land Pattern
0.035
0.90
#1
#2
0.030±0.002
0.75±0.05
0.047
1.20
0.059
1.50
Pin
1
#1
0.048
1.23
#2
0.019
0.48
2
3
4
Functionality
H or Open (4): specified frequency output
Output Enable L: output is high impedance. Only output
driver is disabled
H or Open (4): specified frequency output
L: output is low (weak pull down). Device
OE/ST
Standby
goes to sleep mode. Supply current
reduces to Istd.
Any voltage between 0 and Vdd or open
No Connect (4): specified frequency. pin 1 has no
function
GND
Power
Electrical ground (5)
Out
Output
Oscillator clock output
Vdd
Power
Power supply voltage (5)
Name
0.037
0.93
0.031
0.80
DO NOT SCALE DRAWING
REVISION
-
0.027
0.68
#4
#3
TOP PACKAGE MARKING IS
FOR ILLUSTRATION PURPOSES ONLY
Apracon LLC. 2 Faraday, Suite#B Irvine, Ca. 92618
TITLE:
DWG NO.
Notes: 4. In OE or ST mode, a pull-up resistor of 10kΩ or less between OE/ST pin and Vdd is
recommended if pin 1 is not externally driven. If pin 1 needs to be left floating,
use the NC opition.
5. A capacitor value of 0.1μF or higher between Vdd and GND is required.
ASTMHT
SHEET 1 OF 5
A3
SCALE:30:1
2.5 x 2.0mm Package (Option “D”)
0.098±0.002
2.50±0.05
#4
#3
Recommended Land Pattern
0.043
1.10
0.079±0.002
2.00±0.05
0.059
1.50
#1
#2
0.075
1.90
Pin
#1
#2
1
2
3
4
Functionality
H or Open (4): specified frequency output
Output Enable L: output is high impedance. Only output
driver is disabled
H or Open (4): specified frequency output
L: output is low (weak pull down). Device
OE/ST
Standby
goes to sleep mode. Supply current
reduces to Istd.
Any voltage between 0 and Vdd or open
No Connect (4): specified frequency. pin 1 has no
function
GND
Power
Electrical ground (5)
Out
Output
Oscillator clock output
Vdd
Power
Power supply voltage (5)
DO NOT SCALE DRAWING
REVISION
Name
0.043
1.10
0.020
0.50
0.030±0.002
0.75±0.05
0.039
1.00
-
0.030
0.75
#4
0.039
1.00
#3
Apracon LLC. 2 Faraday, Suite#B Irvine, Ca. 92618
TITLE:
DWG NO.
Notes: 4. In OE or ST mode, a pull-up resistor of 10kΩ or less between OE/ST pin and Vdd is
recommended if pin 1 is not externally driven. If pin 1 needs to be left floating,
use the NC opition.
5. A capacitor value of 0.1μF or higher between Vdd and GND is required.
ASTMHT
SHEET 2 OF 5
A3
SCALE:30:1
3.2 x 2.5mm Package (Option “E”)
0.126±0.002
3.20±0.05
#4
#3
0.075
1.90
Recommended Land Pattern
0.055
1.40
0.047
1.20
0.098±0.002
2.50±0.05
0.087
2.20
0.030±0.002
0.75±0.05
Pin
1
2
3
4
Functionality
H or Open (4): specified frequency output
Output Enable L: output is high impedance. Only output
driver is disabled
H or Open (4): specified frequency output
L: output is low (weak pull down). Device
OE/ST
Standby
goes to sleep mode. Supply current
reduces to Istd.
Any voltage between 0 and Vdd or open
No Connect (4): specified frequency. pin 1 has no
function
GND
Power
Electrical ground (5)
Out
Output
Oscillator clock output
Vdd
Power
Power supply voltage (5)
Name
#1
#2
0.028
0.70
0.083
2.10
#1
#2
0.035
0.90
DO NOT SCALE DRAWING
REVISION
-
0.035
0.90
#4
#3
Notes: 4. In OE or ST mode, a pull-up resistor of 10kΩ or less between OE/ST pin and Vdd is
recommended if pin 1 is not externally driven. If pin 1 needs to be left floating,
use the NC opition.
5. A capacitor value of 0.1μF or higher between Vdd and GND is required.
Apracon LLC. 2 Faraday, Suite#B Irvine, Ca. 92618
TITLE:
DWG NO.
ASTMHT
SHEET 3 OF 5
A3
SCALE:25:1
5.0 x 3.2mm Package (Option “FL”)
0.197±0.002
5.00±0.05
#4
#3
0.059
1.50
Recommended Land Pattern
0.087
2.20
0.126±0.002
3.20±0.05
0.100
2.54
0.030±0.002
0.75±0.05
#1
#2
Pin
0.043
1.10
0.094
2.39
#1
#2
0.031
0.80
1
2
3
4
Functionality
H or Open (4): specified frequency output
Output Enable L: output is high impedance. Only output
driver is disabled
H or Open (4): specified frequency output
L: output is low (weak pull down). Device
OE/ST
Standby
goes to sleep mode. Supply current
reduces to Istd.
Any voltage between 0 and Vdd or open
No Connect (4): specified frequency. pin 1 has no
function
GND
Power
Electrical ground (5)
Out
Output
Oscillator clock output
Vdd
Power
Power supply voltage (5)
DO NOT SCALE DRAWING
REVISION
Name
0.063
1.60
-
0.045
1.15
#4
#3
Notes: 4. In OE or ST mode, a pull-up resistor of 10kΩ or less between OE/ST pin and Vdd is
recommended if pin 1 is not externally driven. If pin 1 needs to be left floating,
use the NC opition.
5. A capacitor value of 0.1μF or higher between Vdd and GND is required.
Apracon LLC. 2 Faraday, Suite#B Irvine, Ca. 92618
TITLE:
DWG NO.
ASTMHT
SHEET 4 OF 5
A3
SCALE:20:1
7.0 x 5.0mm Package (Option “V”)
Recommended Land Pattern
0.200
5.08
#3
0.150
3.81
0.276±0.002
7.00±0.05
#4
0.197±0.002
5.00±0.05
0.035±0.004
0.90±0.10
#1
#2
0.087
2.20
Pin
0.043
1.10
0.200
5.08
#1
#2
1
0.102
2.60
2
3
4
Functionality
H or Open (4): specified frequency output
Output Enable L: output is high impedance. Only output
driver is disabled
H or Open (4): specified frequency output
L: output is low (weak pull down). Device
OE/ST
Standby
goes to sleep mode. Supply current
reduces to Istd.
Any voltage between 0 and Vdd or open
No Connect (4): specified frequency. pin 1 has no
function
GND
Power
Electrical ground (5)
Out
Output
Oscillator clock output
Vdd
Power
Power supply voltage (5)
Name
0.079
2.00
DO NOT SCALE DRAWING
REVISION
-
0.055
1.40
#4
#3
TOP PACKAGE MARKING IS
FOR ILLUSTRATION PURPOSES ONLY
Apracon LLC. 2 Faraday, Suite#B Irvine, Ca. 92618
TITLE:
DWG NO.
Notes: 4. In OE or ST mode, a pull-up resistor of 10kΩ or less between OE/ST pin and Vdd is
recommended if pin 1 is not externally driven. If pin 1 needs to be left floating,
use the NC opition.
5. A capacitor value of 0.1μF or higher between Vdd and GND is required.
ASTMHT
SHEET 5 OF 5
A3
SCALE:10:1
FPGA/CPLD
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