that includes a high-speed 16-bit A/D converter, matching
network, anti-aliasing filter and a low noise, differential
amplifier with fixed gain. It is designed for digitizing wide
dynamic range signals with an intermediate frequency (IF)
range up to 300MHz. The amplifier allows either AC- or DC-
coupled input drive. A lowpass or bandpass filter network
can be implemented with various bandwidths. Contact
Linear Technology regarding semi-custom configurations,
(see Table 1.)
The LTM9001 is perfect for IF receivers in demanding
communications applications, with AC performance that
includes 78dBFS noise floor and 87dB spurious free
dynamic range (SFDR) at 5MHz (LTM9001-GA).
The digital outputs are single-ended CMOS. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.3V.
An optional clock duty cycle stabilizer allows high perfor-
mance at full speed with a wide range of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
n
n
n
n
n
n
n
Integrated 16-Bit, High-Speed ADC, Passive Filter
and Fixed Gain Differential Amplifier
Up to 300MHz IF Range
Lowpass and Bandpass Filter Versions
Low Noise, Low Distortion Amplifiers
Fixed Gain: 8dB, 14dB, 20dB or 26dB
50Ω, 200Ω or 400Ω Input Impedance
78dB SNR, 87dB SFDR (LTM9001-GA)
Integrated Bypass Capacitance, No External
Components Required
Optional Internal Dither
Optional Data Output Randomizer
3.3V Single Supply
Power Dissipation: 550mW (LTM9001-GA)
Clock Duty Cycle Stabilizer
11.25mm
×
11.25mm
×
2.32mm LGA Package
APPLICATIONS
n
n
n
n
n
Telecommunications
High Sensitivity Receivers
Imaging Systems
Spectrum Analyzers
ATE
TYPICAL APPLICATION
Simplified IF Receiver Channel
V
CC
SENSE
V
DD
= 3.3V
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
64k Point FFT, f
IN
= 5MHz,
–1dBFS, PGA = 0
LTM9001-GA
LTM9001-GA
0V
DD
=
0.5V TO 3.6V
AMPLITUDE (dBFS)
D15
IN
SAW
LO
IN
+
DIFFERENTIAL
FIXED GAIN
AMPLIFIER
GND
CLK
ADC CONTROL PINS
–
RF
ANTI-ALIAS
FILTER
16-BIT
25Msps ADC
•
•
•
D0
CLKOUT
OF
OGND
9001-GA TA01
HD2
HD3
0.0
2.5
5.0
7.5
10.0
FREQUENCY (MHz)
12.5
9001-GA TA01a
9001gaf
1
LTM9001-GA
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PIN CONFIGURATION
ALL ELSE
= GND
TOP VIEW
CONTROL
1
J
IN
–
IN
+
H
G
F
V
CC
E
DNC D
C
CLK B
A
CONTROL
V
DD
OGND OV
DD
OGND
OV
DD
2
3
4
DATA
5
6
7
8
9
OGND
Supply Voltage (V
CC
) ................................ –0.3V to 3.6V
Supply Voltage (V
DD
) ................................... –0.3V to 4V
Digital Output Supply Voltage (OV
DD
) .......... –0.3V to 4V
Analog Input Current (IN
+
, IN
–
) ............................±10mA
Digital Input Voltage
(Except AMPSHDN) ................. –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage
(AMPSHDN)..............................–0.3V to (V
CC
+ 0.3V)
Digital Output Voltage ................–0.3V to (OV
DD
+ 0.3V)
Operating Temperature Range
LTM9001C................................................ 0°C to 70°C
LTM9001I.............................................–40°C to 85°C
Storage Temperature Range...................–45°C to 125°C
Maximum Junction Temperature........................... 125°C
LGA PACKAGE
T
JMAX
= 125°C,
JA
= 15°C/W,
JC
= 19°C/W
JA
DERIVED FROM 60mm 70mm PCB WITH 4 LAYERS
WEIGHT = 0.71g
ORDER INFORMATION
LEAD FREE FINISH
LTM9001CV-GA#PBF
LTM9001IV-GA#PBF
TRAY
LTM9001CV-GA#PBF
LTM9001IV-GA#PBF
PART MARKING* PACKAGE DESCRIPTION
LTM9001V-GA
LTM9001V-GA
81-Lead (11.25mm
×
11.25mm
×
2.3mm) LGA
81-Lead (11.25mm
×
11.25mm
×
2.3mm) LGA
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to:
http://www.linear.com/packaging/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
G
DIFF
G
TEMP
V
INCM
V
IN
R
INDIFF
C
INDIFF
V
OS
PARAMETER
Gain
Gain Temperature Drift
Input Common Mode Voltage Range
Input Voltage Range at –1dBFS
Differential Input Impedance
Differential Input Capacitance
Offset Error (Note 6)
Offset Drift
Full-Scale Drift
CONDITIONS
DC, LTM9001-GA
f
IN
= 5MHz
V
IN
= Maximum, (Note 3)
(IN
+
+ IN
–
)/2
LTM9001-GA at 5MHz
LTM9001-GA
Includes Parasitic
Including Amplifier and ADC (LTM9001-GA)
Including Amplifier and ADC
Internal Reference
External Reference
l
l
ELECTRICAL CHARACTERISTICS
MIN
7.2
TYP
8
8
2
1.0–1.6
900
400
1
MAX
8.8
UNITS
dB
mdB/°C
V
mV
P-P
Ω
pF
mV
μV/°C
ppm/°C
ppm/°C
9001gaf
–50
–10
±10
±30
±15
2
LTM9001-GA
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
CMRR
I
SENSE
I
MODE
I
OE
t
AP
t
JITTER
PARAMETER
Common Mode Rejection Ratio
SENSE Input Leakage Current
MODE Pin Pull-Down Current to GND
OE
Pin Pull-Down Current to GND
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
0V < SENSE < V
DD
(Note 9)
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
–3
TYP
60
MAX
3
UNITS
dB
μA
μA
μA
ns
fs
RMS
10
10
1
70
CONVERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Transition Noise
The
l
indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C.
CONDITIONS
l
MIN
16
l
l
TYP
±2.4
±0.3
1
MAX
±8
±1
UNITS
Bits
LSB
LSB
LSB
RMS
Differential Input LTM9001-GA (Note 5)
Differential Input
External Reference
DYNAMIC ACCURACY
SYMBOL
SNR
SFDR
SFDR
S/(N+D)
SFDR
SFDR
IMD3
IIP3
PARAMETER
Signal-to-Noise Ratio
The
l
indicates specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input (PGA = 0)
5MHz Input (PGA = 1)
5MHz Input (PGA = 0)
5MHz Input (PGA = 1)
5MHz Input (PGA = 0)
5MHz Input (PGA = 1)
5MHz Input (PGA = 0)
5MHz Input (PGA = 1)
5MHz Input (PGA = 0)
5MHz Input (PGA = 1)
5MHz Input (PGA = 0)
5MHz Input (PGA = 1)
f
IN
= 5MHz
f
IN
= 5MHz
l
l
l
l
l
l
MIN
76
76
91
75
91
93
TYP
78
75.4
87
89.8
100
99
77.4
74.8
105
107.5
107
109
85
36.5
MAX
UNITS
dBFS
dBFS
dBc
dBc
dBc
dBc
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dB
dBm
Spurious Free Dynamic Range, 2nd or 3rd
Harmonic
Spurious Free Dynamic Range 4th or Higher
Signal-to-Noise Plus Distortion Ratio
Spurious Free Dynamic Range at –15dBFS,
Dither “OFF”
Spurious Free Dynamic Range at –15dBFS,
Dither “ON”
Third Order Intermodulation Distortion;
1MHz Tone Spacing, 2 Tones at –7dBFS
Equivalent Third Order Input Intercept Point,
2 Tone
9001gaf
3
LTM9001-GA
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
IH
V
IL
I
IH
I
IL
C
IN
Logic Outputs
OV
DD
= 3.3V
V
OH
V
OL
I
SOURCE
I
SINK
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
V
DD
= 3.3V, I
O
= –200μA
V
DD
= 3.3V, I
O
= 1.6μA
1.79
0.1
V
V
High Level Output Voltage
Low Level Output Voltage
V
DD
= 3.3V, I
O
= –200μA
V
DD
= 3.3V, I
O
= 1.6mA
2.49
0.1
V
V
High Level Output Voltage
Low Level Output Voltage
Output Source Current
Output Sink Current
V
DD
= 3.3V, I
O
= –10μA
V
DD
= 3.3V, I
O
= –200μA
V
DD
= 3.3V, I
O
= 10μA
V
DD
= 3.3V, I
O
= 1.6mA
V
OUT
= 0V
V
OUT
= 3.3V
l
l
DIGITAL INPUTS AND OUTPUTS
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input High Current
Input Low Current
Input Capacitance
CONDITIONS
V
DD
= 3.3V
V
DD
= 3.3V
V
IN
= 0V to V
DD
(Note 7)
V
CC
= 3.3V
V
CC
= 3.3V
V
IN
= 2V
V
IN
= 0.8V
(Note 7)
l
l
l
l
l
MIN
2
TYP
MAX
UNITS
V
Logic Inputs (DITH, PGA, ADCSHDN, RAND, CLK,
OE)
0.8
±10
1.5
2
0.8
1.3
0.1
1.5
V
μA
pF
V
V
μA
μA
pF
Logic Inputs (AMPSHDN)
3.1
3.299
3.29
0.01
0.1
–50
50
0.4
V
V
V
V
mA
mA
POWER REQUIREMENTS
SYMBOL
V
DD
V
CC
I
CC
P
SHDN
OV
DD
I
VDD
P
DISS
P
DISS(TOTAL)
PARAMETER
ADC Analog Supply Voltage
Amplifier Supply Voltage
Amplifier Supply Current
Total Shutdown Power
Output Supply Voltage
Analog Supply Current
ADC Power Dissipation
Total Power Dissipation
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
(Note 8)
l
l
l
MIN
3.135
2.85
TYP
3.3
100
10
MAX
3.465
3.5
136
3.6
UNITS
V
V
mA
mW
V
mA
mW
mW
AMPSHDN = ADCSHDN = 3.3V
(Note 8)
LTM9001-GA
LTM9001-GA
LTM9001-GA
l
l
l
0.5
66
220
550
80
265
9001gaf
4
LTM9001-GA
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
S
t
L
t
H
CMOS Output Mode
t
D
t
C
t
SKEW
CLK to DATA Delay
CLK to CLKOUT Delay
DATA to CLKOUT Skew
Data Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
Gain is measured from IN
+
/IN
–
through the ADC.
Note 4:
V
CC
= V
DD
= 3.3V, f
SAMPLE
= maximum sample frequency, input
range = –1dBFS with PGA = 0 with differential drive, AC-coupled inputs,
unless otherwise noted.
(Note 7)
(Note 7)
(t
C
– t
D
) (Note 7)
l
l
l
TIMING CHARACTERISTICS
PARAMETER
Sampling Frequency (Note 8)
CLK Low Time (Note 7)
CLK High Time (Note 7)
CONDITIONS
LTM9001-GA
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
l
l
l
l
MIN
1
18.9
5
18.9
5
1.3
1.3
–0.6
TYP
20
20
20
20
3.1
3.1
0
7
MAX
25
500
500
500
500
4.9
4.9
0.6
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from
a “best fit straight line” to the transfer curve. The deviation is measured
from the center of the quantization band.
Note 6:
Offset error is the voltage applied between the IN
+
and IN
–
pins
required to make the output code flicker between 0000 0000 0000 0000
and 1111 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
Recommended operating conditions.
Note 9:
Leakage current will experience transient at power up. Keep
与云数据库相比，小型计算机是专门为网络边缘的去中心化坚固计算而构建的。通过将应用程序、分析和处理服务移动到更靠近数据生成源的位置，业务运营可以获得改进的实时计算应用程序性能。 l 从奔腾到酷睿i5的可扩展CPU性能 l 智能电源点火管理和CAN总线网络支持 l 无线局域网和广域网LTE连接 l 丰富的I/O可扩展性，包括PoE、PCI、PCIe、COM l 适用于宽工作温度和宽电压输入的坚固...[详细]
1. 内容简介 在2015年，苹果新一代的MacBook和Apple Watch皆搭载压力触控感应技术，它被Apple称为Force Touch，用户每次按下触控板之后除了可以在萤幕看见视觉回馈，它同时能够分辨出用户点按的力度强弱来做出一系列的相关操控与应用。而本文将介绍以HY16F184内建高精密Sigma-delta 24 Bit ADC搭配Uneo Force Sensor来实现一...[详细]
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
