74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input
February 1992
Revised June 2001
74LVQ14
Low Voltage Hex Inverter with Schmitt Trigger Input
General Description
The LVQ14 contains six inverter gates each with a Schmitt
trigger input. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free out-
put signals. In addition, they have a greater noise margin
than conventional inverters.
The LVQ14 has hysteresis between the positive-going and
negative-going input thresholds (typically 1.0V) which is
determined internally by transistor ratios and is essentially
insensitive to temperature and supply voltage variations.
Features
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Guaranteed incident wave switching into 75
Ω
Ordering Code:
Order Number
74LVQ14SC
74LVQ14SJ
Package Number
M14A
M14D
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
I
n
O
n
Description
Inputs
Outputs
Truth Table
Input
I
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Output
O
H
L
© 2001 Fairchild Semiconductor Corporation
DS011345
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74LVQ14
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −
0.5V
V
I
=
V
CC
+
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −
0.5V
V
O
=
V
CC
+
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
(I
CC
or I
GND
)
Storage Temperature (T
STG
)
DC Latch-Up Source or
Sink Current
−
0.5V to
+
7.0V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
±
50 mA
±
200 mA
−
65
°
C to
+
150
°
C
±
100 mA
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
)
LVQ
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
∆
V/
∆
t)
V
IN
from 0.8V to 2.0V
V
CC
@ 3.0V
125 mV/ns
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
Unused inputs must be held HIGH or LOW. They may not float.
2.0V to 3.6V
0V to V
CC
0V to V
CC
−
40
°
C to
+
85
°
C
DC Electrical Characteristics
Symbol
V
OH
Parameter
Minimum High Level
Output Voltage
V
OL
Maximum Low Level
Output Voltage
I
IN
V
t
+
V
t
−
V
h(max)
V
h(min)
I
OLD
I
OHD
I
CC
V
OLP
V
OLV
V
IHD
V
ILD
Maximum Input Leakage Current
Maximum Positive Threshold
Minimum Negative Threshold
Maximum Hysteresis
Minimum Hysteresis
Minimum Dynamic
Output Current (Note 4)
Maximum Quiescent
Supply Current
Quiet Output
Maximum Dynamic V
OL
Quiet Output
Minimum Dynamic V
OL
Maximum High Level
Dynamic Input Voltage
Maximum Low Level
Dynamic Input Voltage
V
CC
(V)
3.0
3.0
3.0
3.0
3.6
3.0
3.0
3.0
3.0
3.6
3.6
3.6
3.3
3.3
3.3
3.3
0.9
−0.8
1.9
1.3
2.0
1.1
−1.1
2.0
2.0
0.002
T
A
= +25°C
Typ
2.99
2.9
2.58
0.1
0.36
±0.1
2.2
0.5
1.2
0.3
T
A
= −40°C
to
+85°C
Guaranteed Limits
2.9
2.48
0.1
0.44
±1.0
2.2
0.5
1.2
0.3
36
−25
20.0
V
V
V
V
µA
V
V
V
V
mA
mA
µA
V
V
V
V
I
OUT
= −50 µA
V
IN
=
V
IL
or V
IH
(Note 3)
I
OH
= −12
mA
I
OUT
=
50
µA
V
IN
=
V
IL
or V
IH
(Note 3)
I
OL
=
12 mA
V
I
=
V
CC
, GND
T
A
=
Worst Case
T
A
=
Worst Case
T
A
=
Worst Case
T
A
=
Worst Case
V
OLD
=
0.8V Max (Note 5)
V
OHD
=
2.0V Min (Note 5)
V
IN
=
V
CC
or GND
(Note 6)(Note 7)
(Note 6)(Note 7)
(Note 6)(Note 8)
(Note 6)(Note 8)
Units
Conditions
Note 3:
All outputs loaded; thresholds on input associated with output under test.
Note 4:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 5:
Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed for 74LVQ.
Note 6:
Worst case package.
Note 7:
Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8:
Max number of Data Inputs (n) switching. (n
−
1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f
=
1 MHz.
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2
74LVQ14
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
V
CC
(V)
t
PLH
t
PHL
t
OSHL,
t
OSLH
Propagation Delay
Propagation Delay
Output to Output Skew
Data to Output (Note 9)
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
Min
1.5
1.5
1.5
1.5
C
L
=
50 pF
Typ
11.4
9.5
9.0
7.5
1.0
1.0
Max
19.0
13.5
16.2
11.5
1.5
1.5
T
A
= −40°C
to
+85°C
C
L
=
50 pF
Min
1.5
1.5
1.5
1.5
Max
21.0
15.0
19.0
13.0
1.5
1.5
ns
ns
ns
Units
Note 9:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Symbol
C
IN
C
PD
(Note 10)
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
20
Units
pF
pF
V
CC
=
Open
V
CC
=
3.3V
Conditions
Note 10:
C
PD
is measured at 10 MHz.
3
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74LVQ14
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
www.fairchildsemi.com
4
74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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which, (a) are intended for surgical implant into the
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5
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