74ALVC245 — Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
January 2008
74ALVC245
Low Voltage Bidirectional Transceiver with 3.6V
Tolerant Inputs and Outputs
Features
■
1.65V to 3.6V V
CC
supply operation
■
3.6V tolerant inputs and outputs
■
Power-off high impedance inputs and outputs
■
Supports Live Insertion and Withdrawal
(1)
■
t
PD
:
General Description
The ALVC245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus
oriented applications. The T/R input determines the
direction of data flow. The OE input disables both the A
and B ports by placing them in a high impedance state.
The 74ALVC245 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
– 3.4ns max. for 3.0V to 3.6V V
CC
– 3.9ns max. for 2.3V to 2.7V V
CC
– 6ns max. for 1.65V to 1.95V V
CC
■
Uses patented Quiet Series
noise/EMI reduction
circuitry
■
Latchup conforms to JEDEC JED78
■
ESD performance:
– Human body model
>
2000V
– Machine model
>
200V
Note:
1. To ensure the high impedance state during power up
and power down, OE
n
should be tied to V
CC
through a
pull up resistor. The minimum value of the resistor is
determined by the current sourcing capability of the
driver.
Ordering Information
Order Number
74ALVC245WM
74ALVC245MTC
Package
Number
M20B
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©2001 Fairchild Semiconductor Corporation
74ALVC245 Rev. 1.3.0
www.fairchildsemi.com
74ALVC245 — Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
Connection Diagram
Logic Symbol
Truth Table
Inputs
OE
L
L
Outputs
Bus B
0
–B
7
Data to Bus A
0
–A
7
Bus A
0
–A
7
Data to Bus B
0
–B
7
HIGH Z State on A
0
–A
7
, B
0
–B
7(2)
T/R
L
H
X
Pin Description
Pin
Names
OE
T/R
A
0
–A
7
B
0
–B
7
H
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Note:
2. Unused bus terminals during HIGH Z State must be
held HIGH or LOW.
Logic Diagram
©2001 Fairchild Semiconductor Corporation
74ALVC245 Rev. 1.3.0
www.fairchildsemi.com
2
74ALVC245 — Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
OH
/I
OL
Supply Voltage
DC Input Voltage
Output Voltage
(3)
Parameter
Rating
−
0.5V to
+
4.6V
−
0.5V to 4.6V
−
0.5V to V
CC
+
0.5V
−
50mA
−
50mA
±
50mA
±
100mA
−
65
°
C to
+
150
°
C
DC Input Diode Current, V
I
<
0V
DC Output Diode Current, V
O
<
0V
DC Output Source/Sink Current
I
CC
or GND DC V
CC
or GND Current per Supply Pin
Storage Temperature Range
T
STG
Note:
3. I
O
Absolute Maximum Rating must be observed, limited to 4.6V.
Recommended Operating Conditions
(4)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
I
V
O
T
A
∆
V /
∆
t
Supply Voltage
Input Voltage
Output Voltage
Parameter
Rating
1.65V to 3.6V
0V to V
CC
0V to V
CC
−
40
°
C to
+
85
°
C
10ns/V
Free Air Operating Temperature
Minimum Input Edge Rate: V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
Note:
4. Floating or unused control inputs must be held HIGH or LOW.
©2001 Fairchild Semiconductor Corporation
74ALVC245 Rev. 1.3.0
www.fairchildsemi.com
3
74ALVC245 — Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level Input Voltage
V
CC
(V)
1.65–1.95
2.3–2.7
2.7–3.6
Conditions
Min.
0.65 x V
CC
1.7
2.0
Max.
Units
V
V
IL
LOW Level Input Voltage
1.65–1.95
2.3–2.7
2.7–3.6
0.35 x V
CC
0.7
0.8
I
OH
= −
100µA
I
OH
= −
4mA
I
OH
= −
6mA
I
OH
= −
12mA
V
CC
– 0.2
1.2
2.0
1.7
2.2
2.4
I
OH
= −
24mA
I
OL
=
100µA
I
OL
=
4mA
I
OL
=
mA
I
OL
=
12mA
I
OL
=
24mA
0
≤
V
I
≤
3.6V
0
≤
V
O
≤
3.6V
V
I
=
V
CC
or GND, I
O
=
0
V
IH
=
V
CC
−
0.6V
2
0.2
0.45
0.4
0.7
0.4
0.55
±5.0
±10
10
750
V
V
OH
HIGH Level Output Voltage
1.65–3.6
1.65
2.3
2.3
2.7
3.0
3.0
V
V
OL
LOW Level Output Voltage
1.65–3.6
1.65
2.3
2.3
2.7
3.0
V
I
I
I
OZ
I
CC
∆I
CC
Input Leakage Current
3-STATE Output Leakage
Quiescent Supply Current
Increase in I
CC
per Input
3.6
3.6
3.6
3–3.6
µA
µA
µA
µA
AC Electrical Characteristics
T
A
= −40°C
to
+85°C,
R
L
=
500Ω
C
L
=
50pF
V
CC
=
3.3V
±
0.3V
Symbol
t
PHL
, t
PLH
t
PZL
, t
PZH
t
PLZ
, t
PHZ
C
L
=
30pF
V
CC
=
2.5V
±
0.2V
Min.
1.0
2.0
0.8
V
CC
=
2.7V
Min.
Max.
3.9
6.3
5.3
V
CC
=
1.8V
±
0.15V
Min.
1.5
2.7
1.5
Parameter
Propagation Delay
Output Enable Time
Output Disable Time
Min.
1.3
1.6
1.7
Max.
3.4
5.5
5.5
Max.
3.5
6.0
4.8
Max.
6.0
8.6
8.0
Units
ns
ns
ns
©2001 Fairchild Semiconductor Corporation
74ALVC245 Rev. 1.3.0
www.fairchildsemi.com
4
74ALVC245 — Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
Capacitance
T
A
= +25°C
Symbol
C
IN
C
I/O
C
PD
Input Capacitance
Input/ Output Capacitance
Power Dissipation
Capacitance
Parameter
Control
A or B Ports
Outputs Enabled
Conditions
V
I
=
0V or V
CC
V
I
=
0V or V
CC
f
=
10MHz, C
L
=
0pF
V
CC
3.3
3.3
3.3
2.5
1.8
Typical
3
6
30
27
25
0
0
0
Units
pF
pF
Outputs Disabled
f
=
10MHz, C
L
=
0pF
3.3
2.5
1.8
AC Loading and Waveforms
Table 1. Values for Figure 1
Test
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
Switch
Open
V
L
GND
Figure 1. AC Test Circuit
Table 2. Variable Matrix
(Input Characteristics: f
=
1MHz; t
r
=
t
f
=
2ns; Z
0
=
50Ω)
V
CC
Symbol
V
mi
V
mo
V
X
V
Y
V
L
3.3V
±
0.3V
1.5V
1.5V
V
OL
+
0.3V
V
OH
−
0.3V
6V
2.7V
1.5V
1.5V
V
OL
+
0.3V
V
OH
−
0.3V
6V
2.5V
±
0.2V
V
CC
/ 2
V
CC
/ 2
V
OL
+
0.15V
V
OH
−
0.15V
V
CC
x 2
1.8V
±
0.15V
V
CC
/ 2
V
CC
/ 2
V
OL
+
0.15V
V
OH
−
0.15V
V
CC
x 2
Figure 2. Waveform for Inverting and
Non-Inverting Functions
Figure 3. 3-STATE Output Low Enable and Disable
Times for Low Voltage Logic
©2001 Fairchild Semiconductor Corporation
74ALVC245 Rev. 1.3.0
www.fairchildsemi.com
5
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