74LVT322245 • 74LVTH322245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs and 25Ω Series Resistors in
A Port Outputs
May 2002
Revised May 2002
74LVT322245 • 74LVTH322245
Low Voltage 32-Bit Transceiver with 3-STATE Outputs
and 25
Ω
Series Resistors in A Port Outputs
General Description
The LVT322245 and LVTH322245 contain thirty-two non-
inverting bidirectional buffers with 3-STATE outputs and are
intended for bus oriented applications. The device is byte
controlled. Each byte has separate control inputs which
can be shorted together for full 32-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVT322245 and LVTH322245 are designed with
equivalent 25
Ω
series resistance in both the HIGH and
LOW states on the A Port outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
The LVTH322245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low-volt-
age (3.3V) V
CC
applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The
LVT322245 and LVTH322245 are fabricated with an
advanced BiCMOS technology to achieve high speed
operation similar to 5V ABT while maintaining a low power
dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH322245)
s
Also available without bushold feature (74LVT322245)
s
Live insertion/extraction permitted
s
Power Up/Power Down high impedance provides
glitch-free bus loading
s
A Port outputs include equivalent series resistance of
25
Ω
making external termination resistors unnecessary
and reducing overshoot and undershoot
s
A Port outputs source/sink
±
12 mA
B Port outputs source/sink
−
32 mA/
+
64 mA
s
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
s
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number
74LVT322245G
(Note 1) (Note 2)
74LVTH322245G
(Note 1) (Note 2)
Package Number
BGA96A
(Preliminary)
BGA96A
Package Description
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 1:
Ordering code “G” indicates TRAYS.
Note 2:
Devices also available in TAPE and REEL. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation
DS500408
www.fairchildsemi.com
74LVT322245 • 74LVTH322245
Connection Diagram
FBGA Pin Descriptions
Pin Names
OE
n
T/R
n
A
0
–A
31
B
0
–B
31
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs/3-STATE Outputs
Side B Inputs/3-STATE Outputs
Pin Assignments for FBGA
1
A
B
C
D
E
F
G
H
(Top Thru View)
J
K
L
M
N
P
R
T
B
1
B
3
B
5
B
7
B
9
B
11
B
13
B
14
B
17
B
19
B
21
B
23
B
25
B
27
B
29
B
30
2
B
0
B
2
B
4
B
6
B
8
B
10
B
12
B
15
B
16
B
18
B
20
B
22
B
24
B
26
B
28
B
31
3
T/R
1
GND
V
CC1
GND
GND
V
CC1
GND
T/R
2
T/R
3
GND
V
CC2
GND
GND
V
CC2
GND
T/R
4
4
OE
1
GND
V
CC1
GND
GND
V
CC1
GND
OE
2
OE
3
GND
V
CC2
GND
GND
V
CC2
GND
OE
4
5
A
0
A
2
A
4
A
6
A
8
A
10
A
12
A
15
A
16
A
18
A
20
A
22
A
24
A
26
A
28
A
31
6
A
1
A
3
A
5
A
7
A
9
A
11
A
13
A
14
A
17
A
19
A
21
A
23
A
25
A
27
A
29
A
30
Truth Tables
Inputs
OE
1
L
L
H
Inputs
OE
2
L
L
H
T/R
2
L
H
X
Outputs
Bus B
8
–B
15
Data to Bus A
8
–A
15
Bus A
8
–A
15
Data to Bus B
8
–B
15
HIGH-Z State on A
8
–A
15
, B
8
–B
15
T/R
1
L
H
X
Outputs
Bus B
0
–B
7
Data to Bus A
0
–A
7
Bus A
0
–A
7
Data to Bus B
0
–B
7
HIGH-Z State on A
0
–A
7
, B
0
–B
7
Inputs
OE
3
L
L
H
Inputs
OE
4
L
L
H
T/R
4
L
H
X
Outputs
Bus B
24
–B
31
Data to Bus A
24
–A
31
Bus A
24
–A
31
Data to Bus B
24
–B
31
HIGH-Z State on A
24
–A
31
, B
24
–B
31
T/R
3
L
H
X
Outputs
Bus B
16
–B
23
Data to Bus A
16
–A
23
Bus A
16
–A
23
Data to Bus B
16
–B
23
HIGH-Z State on A
16
–A
23
, B
16
–B
23
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
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2
74LVT322245 • 74LVTH322245
Functional Description
The LVT322245 and LVTH322245 contain thirty-two non-inverting bidirectional buffers with 3-STATE outputs. The device is
byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together
to obtain 16-bit or full 32-bit operation.
Logic Diagrams
Byte 1
Byte 3
Byte 2
Byte 4
V
CC1
is associated with Bytes 1 and 2.
V
CC2
is associated with Bytes 3 and 4.
Note:
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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74LVT322245 • 74LVTH322245
Absolute Maximum Ratings
(Note 3)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 4)
V
I
<
GND
V
O
<
GND
V
O
>
V
CC
V
O
>
V
CC
Output at HIGH State
Output at LOW State
V
mA
mA
mA
mA
mA
−
0.5 to
+
4.6
−
0.5 to
+
7.0
−
0.5 to
+
7.0
−
0.5 to
+
7.0
−
50
−
50
64
128
±
64
±
128
−
65 to
+
150
°
C
Recommended Operating Conditions
Symbol
V
CC
V
I
I
OH
I
OL
T
A
Supply Voltage
Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
Input Edge Rate, V
IN
=
0.8V–2.0V, V
CC
=
3.0V
B Port
A Port
B Port
A Port
Parameter
Min
2.7
0
Max
3.6
5.5
Units
V
V
mA
mA
−
32
−
12
64
12
−
40
0
+
85
10
°
C
ns/V
∆
t/
∆
V
Note 3:
Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 4:
I
O
Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
V
OH
Parameter
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
A Port
B Port
V
OL
Output LOW Voltage
A Port
V
CC
(V)
2.7
2.7–3.6
2.7–3.6
3.0
2.7–3.6
2.7
3.0
3.0
2.7
2.7
B Port
3.0
3.0
3.0
I
I(HOLD)
(Note 5)
I
I(OD)
(Note 5)
I
I
Bushold Input Over-Drive
Current to Change State
Input Current
Control Pins
Data Pins
I
OFF
Power Off Leakage Current
3.6
3.6
3.6
0
Bushold Input Minimum Drive
3.0
3.0
75
−75
500
−500
10
±1
−5
1
±100
µA
µA
2.0
V
CC
−
0.2
2.4
2.0
0.8
0.2
0.5
0.4
0.5
0.55
µA
µA
V
2.0
0.8
T
A
= −40°C
to
+85°C
Min
Max
−1.2
Units
V
V
V
V
V
V
V
V
Conditions
I
I
= −18
mA
V
O
≤
0.1V or
V
O
≥
V
CC
−
0.1V
I
OH
= −12
mA
I
OH
= −100 µA
I
OH
= −8
mA
I
OH
= −32
mA
I
OL
=
12 mA
I
OL
=
100
µA
I
OL
=
24 mA
I
OL
=
16 mA
I
OL
=
32 mA
I
OL
=
64 mA
V
I
=
0.8V
V
I
=
2.0V
(Note 6)
(Note 7)
V
I
=
5.5V
V
I
=
0V or V
CC
V
I
=
0V
V
I
=
V
CC
0V
≤
V
I
or V
O
≤
5.5V
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4
74LVT322245 • 74LVTH322245
DC Electrical Characteristics
Symbol
I
PU/PD
I
OZL
I
OZL
(Note 5)
I
OZH
I
OZH
(Note 5)
I
OZH
+
I
CCH
I
CCL
I
CCZ
I
CCZ
+
∆I
CC
Power Up/Down
3-STATE Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
Increase in Power Supply Current
(Note 8)
Parameter
(Continued)
V
CC
(V)
0–1.5V
3.6
3.6
3.6
3.6
3.6
T
A
= −40°C
to
+85°C
Min
Max
±100
−5
−5
5
5
10
0.19
5
0.19
0.19
0.2
µA
µA
µA
µA
µA
µA
mA
mA
mA
mA
mA
V
O
=
0.5V to 3.0V
V
I
=
GND to V
CC
V
O
=
0.5V
V
O
=
0.0V
V
O
=
3.0V
V
O
=
3.6V
V
CC
<
V
O
≤
5.5V
Outputs HIGH
Outputs LOW
Outputs Disabled
V
CC
≤
V
O
≤
5.5V,
Outputs Disabled
One Input at V
CC
−
0.6V
Other Inputs at V
CC
or GND
Units
Conditions
V
CC1
or V
CC2
V
CC1
or V
CC2
V
CC1
or V
CC2
V
CC1
or V
CC2
3.6
3.6
3.6
3.6
3.6
V
CC1
or V
CC2
Note 5:
Applies to bushold versions only (74LVTH322245).
Note 6:
An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7:
An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8:
This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
Symbol
V
OLP
V
OLV
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
V
CC
(V)
3.3
3.3
(Note 9)
T
A
=
25°C
Min
Typ
0.8
−0.8
Max
Units
V
V
Conditions
C
L
=
50 pF R
L
=
500Ω
(Note 10)
(Note 10)
Note 9:
Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10:
Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
T
A
= −40°C
to
+85°C
Symbol
Parameter
C
L
=
50 pF, R
L
=
500Ω
V
CC
=
3.3V
±
0.3V
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PHZ
t
PLZ
Output Disable Time for B Port Output
Output Disable Time for A Port Output
Output Enable Time for B Port Output
Output Enable Time for A Port Output
Propagation Delay Data to B Port Output
Propagation Delay Data to A Port Output
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.5
1.5
1.5
1.5
Max
4.0
3.7
3.5
3.5
5.3
5.6
4.6
5.3
5.6
5.5
5.4
5.1
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.5
1.5
1.5
1.5
V
CC
=
2.7V
Min
Max
4.6
4.1
3.9
3.9
6.3
7.2
5.4
6.9
6.3
5.5
6.1
5.4
ns
ns
ns
ns
ns
ns
Units
Capacitance
Symbol
C
IN
C
I/O
(Note 11)
Parameter
Conditions
V
CC
=
0V, V
I
=
0V or V
CC
V
CC
=
3.0V, V
O
=
0V or V
CC
Typical
4
8
Units
pF
pF
Input Capacitance
Input/Output Capacitance
Note 11:
Capacitance is measured at frequency f
=
1 MHz, per MIL-STD-883, Method 3012.
5
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