74VCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold
January 2000
Revised June 2005
74VCXH162244
Low Voltage 16-Bit Buffer/Line Driver with Bushold
and 26: Series Resistor in Outputs
General Description
The VCXH162244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The VCXH162244 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level
The 74VCXH162244 is also designed with 26
:
series
resistors in the outputs. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
The 74VCXH162244 is designed for low voltage (1.4V to
3.6V) V
CC
applications with output capability up to 3.6V.
The 74VCXH162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant control inputs and outputs
s
Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s
26
:
series resistors in outputs
s
t
PD
3.3 ns max for 3.0V to 3.6V V
CC
s
Static Drive (I
OH
/I
OL
)
r
12 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
Ordering Code:
Order Number
74VCXH162244MTD
74VCXH162244MTX
(Note 1)
Package
Number
MTD48
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
Use this Order Number to receive devices in Tape and Reel.
Logic Symbol
Pin Descriptions
Pin Names
OE
n
I
0
–I
15
O
0
–O
15
Description
Output Enable Input (Active LOW)
Bushold Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation
DS500231
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74VCXH162244
Connection Diagram
Truth Tables
Inputs
OE
1
L
L
H
Inputs
OE
2
L
L
H
Inputs
OE
3
L
L
H
Inputs
OE
4
L
L
H
I
12
–I
15
L
H
X
I
8
–I
11
L
H
X
I
4
–I
7
L
H
X
I
0
–I
3
L
H
X
Outputs
O
0
–O
3
L
H
Z
Outputs
O
4
–O
7
L
H
Z
Outputs
O
8
–O
11
L
H
Z
Outputs
O
12
–O
15
L
H
Z
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial (HIGH or LOW, inputs may not float)
Z High Impedance
Functional Description
The 74VCXH162244 contains sixteen non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) controlled
with each nibble functioning identically, but independent of each other. The control pins may be shorted together to obtain
full 16-bit operation.The 3-STATE outputs are controlled by an Output Enable (OE
n
) input. When OE
n
is LOW, the outputs
are in the 2-state mode. When OE
n
is HIGH, the standard outputs are in the high impedance mode but this does not inter-
fere with entering new data into the inputs.
Logic Diagram
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74VCXH162244
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
I
)
OE
n
I
0
– I
15
Output Voltage (V
O
)
Outputs 3-STATE
Outputs Active (Note 3)
DC Input Diode Current (I
IK
)
V
I
0V
DC Output Diode Current (I
OK
)
V
O
0V
V
O
!
V
CC
DC Output Source/Sink Current
(I
OH
/I
OL
)
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND)
Storage Temperature Range (T
STG
)
0.5V to
4.6V
0.5V to 4.6V
0.5V to V
CC
0.5V
0.5V to
4.6V
0.5V to V
CC
0.5V
50 mA
50 mA
50 mA
r
50 mA
r
100 mA
65
q
C to
150
q
C
Recommended Operating
Conditions
(Note 4)
Power Supply
Operating
Data Retention Only
Input Voltage
Output Voltage (V
O
)
Output in Active States
Output in 3-STATE
Output Current in I
OH
/I
OL
V
CC
V
CC
V
CC
V
CC
3.0V to 3.6V
2.3V to 2.7V
1.65V to 2.3V
1.4V to 1.6V
0V to V
CC
0.0V to 3.6V
1.4V to 3.6V
1.2V to 3.6V
0.3V to V
CC
Free Air Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
t/
'
V)
V
IN
0.8V to 2.0V, V
CC
3.0V
r
12 mA
r
8 mA
r
3 mA
r
2 mA
40
q
C to
85
q
C
10 ns/V
Note 2:
The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the condi-
tions for actual device operation.
Note 3:
I
O
Absolute Maximum Rating must be observed.
Note 4:
Floating or unused control inputs must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level Input Voltage
Conditions
V
CC
(V)
2.7 - 3.6
2.3 - 2.7
1.65 - 2.3
1.4 - 1.6
V
IL
LOW Level Input Voltage
2.7 - 3.6
2.3 - 2.7
1.65 - 2.3
1.4 - 1.6
V
OH
HIGH Level Output Voltage
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
I
OH
2.0
1.6
0.65
u
V
CC
0.65
u
V
CC
0.8
0.7
0.35
u
V
CC
0.35
u
V
CC
V
CC
- 0.2
2.2
2.4
2.2
V
CC
- 0.2
2.0
1.8
1.7
V
CC
- 0.2
1.25
V
CC
- 0.2
1.05
V
V
V
Min
Max
Units
100
P
A
6 mA
8 mA
12 mA
100
P
A
4 mA
6 mA
8 mA
100
P
A
3 mA
100
P
A
1 mA
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
3
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74VCXH162244
DC Electrical Characteristics
Symbol
V
OL
Parameter
LOW Level Output Voltage
(Continued)
V
CC
(V)
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
100
P
A
6 mA
8 mA
12 mA
100
P
A
6 mA
8 mA
100
P
A
3 mA
100
P
A
1 mA
V
CC
or GND
0.8V
2.0V
0.7V
1.6V
0.57V
1.07V
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
1.4 - 3.6
1.4 - 3.6
3.0
3.0
2.3
2.3
1.65
1.65
3.6
3.6
2.7
2.7
1.95
1.95
2.7 - 3.6
0
2.7 - 3.6
2.7 - 3.6
2.7 - 3.6
75
0.2
0.4
0.55
0.8
0.2
0.4
0.6
0.2
0.3
0.2
0.35
V
Conditions
Min
Max
Units
I
I
I
I(HOLD)
Input Leakage Current
Bushold Input Minimum
Drive Hold Current
Control Pins
Data Pins
0
d
V
I
d
3.6V
V
I
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
r
5.0
r
5.0
75
45
P
A
45
25
P
A
25
450
I
I(OD)
Bushold Input Over-Drive
Current to Change State
(Note 5)
(Note 6)
(Note 5)
(Note 6)
(Note 5)
(Note 6)
450
300
300
200
P
A
200
r
10.0
10.0
20.0
I
OZ
I
OFF
I
CC
3-STATE Output Leakage
Power-OFF Leakage Current
Quiescent Supply Current
Increase in I
CC
per Input
0
d
V
O
d
3.6V
V
I
V
I
V
IH
V
IH
or V
IL
V
CC
or GND
V
CC
0.6V
0
d
(V
O
)
d
3.6V
V
CC
d
(V
O
)
d
3.6V (Note 7)
P
A
P
A
P
A
P
A
P
A
r
20.0
750
'
I
CC
Note 5:
An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6:
An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7:
Outputs disabled or 3-STATE only.
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74VCXH162244
AC Electrical Characteristics
(Note 8)
Symbol
t
PHL
t
PLH
C
L
t
PZL
t
PZH
C
L
t
PLZ
t
PHZ
Output Disable Time
C
L
30 pF, R
L
30 pF, R
L
500
:
500
:
Output Enable Time
C
L
30 pF, R
L
30 pF, R
L
500
:
500
:
Parameter
Propagation Delay
C
L
Conditions
30 pF, R
L
500
:
V
CC
(V)
3.3
r
0.3
2.5
r
0.2
1.8
r
0.15
1.5
r
0.1
3.3
r
0.3
2.5
r
0.2
1.8
r
0.15
1.5
r
0.1
3.3
r
0.3
2.5
r
0.2
1.8
r
0.15
1.5
r
0.1
t
OSHL
t
OSLH
Output-to-Output Skew
(Note 9)
C
L
Note 8:
For C
L
T
A
40
q
C to
85
q
C
Min
0.8
1.0
1.5
1.0
0.8
1.0
1.5
1.0
0.8
1.0
1.5
1.0
Max
3.3
3.8
7.6
15.2
3.8
5.1
9.8
19.6
3.6
4.0
7.2
14.4
0.5
0.5
0.75
1.5
Units
Figure
Number
Figures
1, 2
Figures
5, 6
Figures
1, 3, 4
Figures
5, 7, 8
Figures
1, 3, 4
Figures
5, 7, 8
ns
ns
ns
C
L
30 pF, R
L
500
:
3.3
r
0.3
2.5
r
0.2
1.8
r
0.15
ns
30 pF, R
L
500
:
1.5
r
0.1
50
P
F, add approximately 300 ps to the AC maximum specification.
Note 9:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Dynamic Switching Characteristics
Symbol
V
OLP
Parameter
Quiet Output Dynamic Peak V
OL
C
L
30 pF, V
IH
Conditions
V
CC
, V
IL
0V
V
CC
(V)
1.8
2.5
3.3
V
OLV
Quiet Output Dynamic Valley V
OL
C
L
30 pF, V
IH
V
CC
, V
IL
0V
1.8
2.5
3.3
V
OHV
Quiet Output Dynamic Valley V
OH
C
L
30 pF, V
IH
V
CC
, V
IL
0V
1.8
2.5
3.3
T
A
25
q
C
Typical
0.15
0.25
0.35
V
Units
0.15
0.25
0.35
1.55
2.05
2.65
V
V
Capacitance
Symbol
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Parameter
V
CC
V
I
V
I
Conditions
1.8, 2.5V or 3.3V, V
I
0V or V
CC
, V
CC
0V or V
CC
, f
0V or V
CC
1.8V, 2.5V or 3.3V
T
A
25
q
C
Typical
6.0
7.0
20.0
pF
pF
pF
1.8V, 2.5V or 3.3V
Units
10 MHz, V
CC
5
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