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74LVTH16652MEAX

产品描述IC TXRX NON-INVERT 3.6V 56SSOP
产品类别半导体    逻辑   
文件大小87KB,共9页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
标准
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74LVTH16652MEAX概述

IC TXRX NON-INVERT 3.6V 56SSOP

74LVTH16652MEAX规格参数

参数名称属性值
逻辑类型收发器,非反相
元件数2
每元件位数8
输出类型三态
电流 - 输出高,低32mA,64mA
电压 - 电源2.7 V ~ 3.6 V
工作温度-40°C ~ 85°C(TA)
安装类型表面贴装
封装/外壳56-BSSOP(0.295",7.50mm 宽)
供应商器件封装56-SSOP

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74LVTH16652 Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs
January 2000
Revised November 2000
74LVTH16652
Low Voltage 16-Bit Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH16652 consists of sixteen bus transceiver circuits
with D-type flip-flops, and control circuitry arranged for mul-
tiplexed transmission of data directly from the input bus or
from the internal registers. Each byte has separate control
inputs which can be shorted together for full 16-bit opera-
tion. Data on the A or B bus will be clocked into the regis-
ters as the appropriate clock pin goes to the HIGH logic
level. Output Enable pins (OEAB, OEBA) are provided to
control the transceiver function (see Functional Descrip-
tion).
The LVTH16652 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
The transceivers are designed for low-voltage (3.3V) V
CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH16652 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
Outputs source/sink
32 mA/
+
64 mA
s
Functionally compatible with the 74 series 16652
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
Ordering Code:
Order Number
74LVTH16652MEA
74LVTH16652MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation
DS012024
www.fairchildsemi.com

74LVTH16652MEAX相似产品对比

74LVTH16652MEAX 74LVTH16652MEA 74LVTH16652MTD
描述 IC TXRX NON-INVERT 3.6V 56SSOP IC TXRX NON-INVERT 3.6V 56SSOP IC TXRX NON-INVERT 3.6V 56TSSOP
逻辑类型 收发器,非反相 收发器,非反相 收发器,非反相
元件数 2 2 2
每元件位数 8 8 8
输出类型 三态 三态 三态
电流 - 输出高,低 32mA,64mA 32mA,64mA 32mA,64mA
电压 - 电源 2.7 V ~ 3.6 V 2.7 V ~ 3.6 V 2.7 V ~ 3.6 V
工作温度 -40°C ~ 85°C(TA) -40°C ~ 85°C(TA) -40°C ~ 85°C(TA)
安装类型 表面贴装 表面贴装 表面贴装
封装/外壳 56-BSSOP(0.295",7.50mm 宽) 56-BSSOP(0.295",7.50mm 宽) 56-TFSOP(0.240",6.10mm 宽)
供应商器件封装 56-SSOP 56-SSOP 56-TSSOP

 
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