In the transceiver mode, data present at the HIGH imped-
ance port may be stored in either the A or B register or
both.
The select (SAB
n
, SBA
n
) controls can multiplex stored and
real-time.
The examples in
Figure 1
demonstrate the four fundamen-
tal bus-management functions that can be performed with
the ABT16652.
Data on the A or B data bus, or both can be stored in the
internal D flip-flop by LOW to HIGH transitions at the
appropriate Clock Inputs (CPAB
n
, CPBA
n
) regardless of
the Select or Output Enable Inputs. When SAB and SBA
are in the real time transfer mode, it is also possible to
store data without using the internal D flip-flops by simulta-
neously enabling OEAB
n
and OEBA
n
. In this configuration
each Output reinforces its Input. Thus when all other data
sources to the two sets of bus lines are in a HIGH imped-
ance state, each set of bus lines will remain at its last state.
Note A: Real-Time
Transfer Bus B to Bus A
Note C: Storage
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB
1
1
1
1
1
SBA
1
1
1
X
L
L
H
X
H
L
L
X
X
X
L
Note B: Real-Time
Transfer Bus A to Bus B
1
1
1
1
X
X
X
X
X
X
X
X
Note D: Transfer Storage
Data to A or B
OEAB OEBA CPAB CPBA SAB
1
1
1
1
1
SBA
1
H
H
X
X
L
X
OEAB OEBA CPAB
1
CPBA SAB SBA
1
1
1
1
1
H
FIGURE 1.
L
H or L H or L
H
H
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2
74ABT16652
Function Table
Inputs
OEAB
1
OEBA
1
L
L
X
H
L
L
L
L
H
H
H
H
H
H
H
X
L
L
L
H
H
L
CPAB
1
CPBA
1
SAB
1
SBA
1
H or L
Inputs/Outputs (Note 1)
A
0
thru A
7
Input
Input
Input
Output
Output
B
0
thru B
7
Input
Isolation
Store A and B Data
Not Specified Store A, Hold B
Output
Input
Input
Store A in Both Registers
Hold A, Store B
Store B in Both Registers
Real-Time B Data to A Bus
Store B Data to A Bus
Input
Output
Output
Output
Real-Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and
Stored B Data to A Bus
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW to HIGH Clock Transition
Operating Mode
H or L
X
X
X
H or L
H or L
X
X
X
X
X
X
X
X
X
X
X
L
H
H
X
X
X
X
X
X
L
H
X
X
H
Not Specified Input
H or L
H or L
H or L
H or L
Note 1:
The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every LOW to HIGH transition on the clock inputs. This also applies to data I/O (A and B: 8–15) and #2 control pins.
Logic Diagrams
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
www.fairchildsemi.com
74ABT16652
Absolute Maximum Ratings
(Note 2)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to
Ground Pin
Input Voltage (Note 3)
Input Current (Note 3)
Voltage Applied to Any Output
in the Disable or Power-Off State
in the HIGH State
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
twice the rated I
OL
(mA)
−500
mA
−0.5V
to
+5.5V
−0.5V
to V
CC
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
Over Voltage Latchup (I/O)
10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate (∆V/∆t)
Data Input
Enable Input
Clock Input
50 mV/ns
20 mV/ns
100 mV/ns
−40°C
to
+85°C
+4.5V
to
+5.5V
Note 2:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 3:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
V
ID
I
IH
I
BVI
I
BVIT
I
IL
I
IH
+
I
OZH
I
IL
+
I
OZL
I
OS
I
CEX
I
ZZ
I
CCH
I
CCL
I
CCZ
I
CCT
I
CCD
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW Voltage
Input Leakage Test
Input HIGH Current
Input HIGH Current
Breakdown Test
Input HIGH Current
Breakdown Test (I/O)
Input LOW Current
Output Leakage Current
−1
−1
10
−10
−275
50
100
1.0
60
1.0
2.5
No Load
0.23
µA
µA
mA
µA
µA
mA
mA
mA
mA
mA/MHz
0V–5.5V
µA
Max
V
IN
=
0.5V (Non-I/O Pins) (Note 4)
V
IN
=
0.0V (Non-I/O Pins)
V
OUT
=
2.7V (A
n
, B
n
);
OEAB
n
=
GND and OEBA
n
=
2.0V
Output Leakage Current
0V–5.5V
V
OUT
=
0.5V (A
n
, B
n
);
OEAB
n
=
GND and OEBA
n
=
2.0V
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
Additional I
CC
/Input
Dynamic I
CC
(Note 4)
Max
Max
0.0V
Max
Max
Max
Max
Max
V
OUT
=
0V (A
n
, B
n
)
V
OUT
=
V
CC
(A
n
, B
n
)
V
OUT
=
5.5V (A
n
, B
n
); All Others GND
All Outputs HIGH
All Outputs LOW
Outputs 3-STATE;
All Others at V
CC
or GND
V
I
=
V
CC
−
2.1V
All Others at V
CC
or GND
Outputs Open
OEAB
n
, OEBA
n
and SEL
=
GND
Non-I/O
=
GND or V
CC
One bit toggling, 50% duty cycle
Note 4:
Guaranteed but not tested.
Min
Typ
Max
Units
V
V
CC
Conditions
Recognized HIGH Signal
Recognized LOW Signal
0.8
−1.2
2.5
2.0
0.55
V
V
V
V
V
Min
Min
Min
0.0
Max
Max
Max
I
IN
= −18
mA (Non I/O Pins)
I
OH
= −3
mA, (A
n
, B
n
)
I
OH
= −32
mA, (A
n
, B
n
)
I
OL
=
64 mA, (A
n
, B
n
)
I
ID
=
1.9
µA,
(Non-I/O Pins)
All Other Pins Grounded
V
IN
=
2.7V (Non-I/O Pins) (Note 4)
V
IN
=
V
CC
(Non-I/O Pins)
V
IN
=
7.0V (Non-I/O Pins)
V
IN
=
5.5V (A
n
, B
n
)
1
1
7
100
µA
µA
µA
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4
74ABT16652
DC Electrical Characteristics
(SSOP Package)
Symbol
V
OLP
V
OLV
V
OHV
V
IHD
V
ILD
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Output Voltage
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
−1.4
2.5
2.0
Min
Typ
0.7
−1.0
3.0
1.6
1.2
0.8
Max
1.2
Units
V
V
V
V
V
V
CC
5.0
5.0
5.0
5.0
5.0
Conditions
C
L
=
50 pF, R
L
=
500Ω
T
A
=
25°C (Note 5)
T
A
=
25°C (Note 5)
T
A
=
25° (Note 6)
T
A
=
25°C (Note 7)
T
A
=
25°C (Note 7)
Note 5:
Max number of outputs defined as (n). n
−
1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6:
Max number of outputs defined as (n). n
−
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
Note 7:
Max number of data inputs (n) switching. n
−
1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
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