74ABT16646 16-Bit Transceivers and Registers with 3-STATE Outputs
October 1993
Revised November 1999
74ABT16646
16-Bit Transceivers and Registers with 3-STATE Outputs
General Description
The ABT16646 consists of bus transceiver circuits with 3-
STATE, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the input bus
or from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to a high logic level. Control OE and direction pins are pro-
vided to control the transceiver function. In the transceiver
mode, data present at the high impedance port may be
stored in either the A or the B register or in both. The select
controls can multiplex stored and real-time (transparent
mode) data. The direction control determines which bus
will receive data when the enable control OE is Active
LOW. In the isolation mode (control OE HIGH), A data may
be stored in the B register and/or B data may be stored in
the A register.
Features
s
Independent registers for A and B buses
s
Multiplexed real-time and stored data
s
A and B output sink capability of 64 mA, source
capability of 32 mA
s
Guaranteed latchup protection
s
High impedance glitch free bus loading during entire
power up and power down cycle
s
Nondestructive hot insertion capability
Ordering Code:
Order Number
74ABT16646CSSC
74ABT16646CMTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
A
0
–A
15
Description
Data Register A Inputs/
3-STATE Outputs
B
0
–B
15
Data Register B Inputs/
3-STATE Outputs
CPAB
n
, CPBA
n
SAB
n
, SBA
n
OE
n
DIR
Clock Pulse Inputs
Select Inputs
Output Enable Input
Direction Control Input
© 1999 Fairchild Semiconductor Corporation
DS011644
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74ABT16646
Function Table
Inputs
OE
1
H
H
H
L
L
L
L
L
L
L
L
DIR
1
X
X
X
H
H
H
H
L
L
L
L
CPAB
1
CPBA
1
SAB
1
H or L
SBA
1
X
X
X
X
X
X
X
L
L
H
H
Output
Input
Input
Output
Input
Input
Data I/O (Note 1)
A
0–7
B
0–7
Isolation
Clock An Data into A Register
Clock Bn Data Into B Register
An to Bn—Real Time (Transparent Mode)
Clock An Data to A Register
A Register to Bn (Stored Mode)
Clock An Data into A Register and Output to Bn
Bn to An—Real Time (Transparent Mode)
Clock Bn Data into B Register
B Register to An (Stored Mode)
Clock Bn into B Register and Output to An
Output Operation Mode
X
H or L
X
X
X
L
L
H
H
X
X
X
X
X
X
X
X
X
H or L
X
X
X
X
X
H or L
X
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition
Note 1:
The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15)
and #2 control pins.
Real Time Transfer
A-Bus to B-Bus
Real Time Transfer
B-Bus to A-Bus
FIGURE 1.
FIGURE 2.
Storage from
Bus to Register
Transfer from
Register to Bus
FIGURE 3.
FIGURE 4.
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74ABT16646
Logic Diagram
3
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74ABT16646
Absolute Maximum Ratings
(Note 2)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 3)
Input Current (Note 3)
Voltage Applied to Any Output
in the Disable or
Power-Off State
in the HIGH State
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
Over Voltage Latchup (I/O)
twice the rated I
OL
(mA)
−500
mA
10V
−0.5V
to
+5.5V
−0.5V
to V
CC
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate (∆V/∆t)
Data Input
Enable Input
Clock Input
50 mV/ns
20 mV/ns
100 mV/ns
−40°C
to
+85°C
+4.5V
to
+5.5V
Note 2:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 3:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
V
ID
I
IH
I
BVI
I
BVIT
I
IL
I
IH
+
I
OZH
I
IL
+
I
OZL
I
OS
I
CEX
I
ZZ
I
CCH
I
CCL
I
CCZ
I
CCT
I
CCD
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input Leakage Test
Input HIGH Current
Input HIGH Current Breakdown Test
Input HIGH Current Breakdown Test (I/O)
Input LOW Current
4.75
1
1
7
100
−1
−1
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
Additional I
CC
/Input
Dynamic I
CC
(Note 5)
No Load
0.23
−100
10
−10
−275
50
100
1.0
60
1.0
2.5
2.5
2.0
0.55
V
V
Min
0.0
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
Min
V
CC
Conditions
Recognized HIGH Signal
Recognized LOW Signal
I
IN
= −18
mA (Non I/O Pins)
I
OH
= −3
mA, (A
n
, B
n
)
I
OH
= −32
mA, (A
n
, B
n
)
I
OL
=
64 mA, (A
n
, B
n
)
I
ID
=
1.9
µA,
(Non-I/O Pins)
All Other Pins Grounded
µA
µA
µA
µA
µA
µA
mA
µA
µA
mA
mA
mA
mA
mA/
MHz
Max
Max
Max
Max
0V–5.5V
0V–5.5V
Max
Max
0.0V
Max
Max
Max
Max
Max
V
IN
=
2.7V (Non-I/O Pins) (Note 5)
V
IN
=
V
CC
(Non-I/O Pins)
V
IN
=
7.0V (Non-I/O Pins)
V
IN
=
5.5V (A
n
, B
n
)
V
IN
=
0.5V (Non-I/O Pins) (Note 5)
V
IN
=
0.0V (Non-I/O Pins)
V
OUT
=
2.7V (A
n
, B
n
); OE
=
2.0V
V
OUT
=
0.5V (A
n
, B
n
); OE
=
2.0V
V
OUT
=
0V (A
n
, B
n
)
V
OUT
=
V
CC
(A
n
, B
n
)
V
OUT
=
5.5V (A
n
, B
n
);
All Others GND
All Outputs HIGH
All Outputs LOW
Outputs 3-STATE; All Others GND
V
I
=
V
CC
−
2.1V
All Other Outputs at V
CC
or GND
Outputs OPEN
OE, DIR, and SEL
=
GND,
Non-I/O
=
GND or V
CC
(Note 4)
One Bit toggling, 50% duty cycle
Note 4:
For 8-bit toggling, I
CCD
<
1.4 mA/MHz.
Note 5:
Guaranteed but not tested.
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74ABT16646
DC Electrical Characteristics
(SSOP Package)
Symbol
V
OLP
V
OLV
V
OHV
V
IHD
V
ILD
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Output Voltage
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
−1.4
2.5
2.2
Min
Typ
0.7
−1.0
3.0
1.6
1.2
0.8
Max
1.2
Units
V
V
V
V
V
V
CC
5.0
5.0
5.0
5.0
5.0
Conditions
C
L
=
50 pF, R
L
=
500Ω
T
A
=
25°C (Note 6)
T
A
=
25°C (Note 6)
T
A
=
25° (Note 7)
T
A
=
25°C (Note 8)
T
A
=
25°C (Note 8)
Note 6:
Max number of outputs defined as (n). n
−
1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 7:
Max number of outputs defined as (n). n
−
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
Note 8:
Max number of data inputs (n) switching. n
−
1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
ILD
), 0V to threshold (V
IHD
).
Guaranteed, but not tested.
AC Electrical Characteristics
(SSOP Package)
T
A
= +25°C
Symbol
Parameter
Min
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum Clock Frequency
Propagation Delay
Clock to Bus
Propagation Delay
Bus to Bus
Propagation Delay
SBA
n
or SAB
n
to A
n
to B
n
Enable Time
OE
n
to A
n
or B
n
Disable Time
OE
n
to A
n
or B
n
Enable Time
DIR
n
to A
n
or B
n
Disable Time
DIR
n
to A
n
or B
n
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
V
CC
= +5.0V
C
L
=
50 pF
Typ
200
3.0
3.4
2.6
3.0
2.9
3.2
2.8
3.0
3.9
3.2
3.5
3.2
3.8
3.2
4.9
4.9
4.5
4.5
5.0
5.0
5.5
5.5
6.0
6.0
5.5
5.5
6.5
6.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
4.9
4.9
4.5
4.5
5.0
5.0
5.5
5.5
6.0
6.0
5.5
5.5
6.5
6.5
Max
Min
T
A
= −40°C
to
+85°C
V
CC
=
4.5V–5.5V
C
L
=
50 pF
Max
MHz
ns
ns
ns
ns
Units
ns
ns
ns
AC Operating Requirements
T
A
= +25°C
Symbol
Parameter
Min
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
W
(H)
t
W
(L)
Setup Time, HIGH
or LOW Bus to Clock
Hold Time, HIGH
or LOW Bus to Clock
Pulse Width,
HIGH or LOW
2.0
1.0
3.0
V
CC
= +5.0V
C
L
=
50 pF
Max
Min
2.0
1.0
3.0
T
A
= −40°C
to
+85°C
V
CC
=
4.5V–5.5V
C
L
=
50 pF
Max
ns
ns
ns
Units
5
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