LTC221/LTC222
Micropower, Low Charge
Injection, Quad CMOS Analog
Switches with Data Latches
DESCRIPTIO
The LTC
®
221 and LTC222 are micropower, quad CMOS
analog switches which typically dissipate only 250µW
from
±15V
supplies and 40µW from a single 5V supply.
Onboard latches allow the LTC221 and LTC222 to inter-
face directly to most microprocessor buses. The switches
have 65Ω typical on resistance and a very high off resis-
tance. A break before make characteristic is inherent in
these switches to prevent the shorting of two channels.
The signal range is
±15V
with a supply voltage of
±15V
and
0V to 5V with a single 5V supply. The switches have special
charge compensation circuitry which greatly reduces
charge injection to a maximum of
±25pC
(±15V supplies).
The LTC221 and LTC222 are designed for applications
such as microprocessor controlled programmable gain
amplifiers, automatic test equipment, communication
systems, and data acquisition systems. The LTC221 is
normally closed and the LTC222 is normally open as
shown in the Logic Table.
, LTC and LT are registered trademarks of Linear Technology Corporation.
FEATURES
■
■
■
■
■
■
■
■
■
■
Micropower Operation
Single 5V or
±15V
Supply Operation
Low Charge Injection
Low R
ON
Low Leakage
Guaranteed Break Before Make
Latch Resistant Design
TLL/CMOS Compatible
Improved Second Source for DG221/DG222
Microprocessor Bus Compatible
KEY SPECIFICATIO S
■
■
■
■
Supply Current
Charge Injection
±15V
Supplies .................................
±25pC
Max
Single 5V Supply .................................. 2pC Typ
R
ON
............................................................... 65ΩTyp
Signal Range .....................................................
±15V
..................... I
+
= 40µA, I
–
= 5µA Max
TYPICAL APPLICATIO
LTC221/LTC222
WR
5V
V
+
GND
V
–
IN4
IN3
IN2
IN1
V
FS
V
IN
OV TO 5V
S3
S4
D3
D4
S1
S2
D1
D2
Two-Channel, 12-Bit, Self Calibrating Data Acquisition System
WR
LOGIC
DECODER
ADDRESS BUS
DATA BUS B0 – B3
TO MICROPROCESSOR
e.g. TMS320C25
15V
5V
10k IN
+
LT1006
LTC1292
12-BIT
ADC
CLK
D
OUT
CS
SERIAL PORT
100k
–
150k
–IN
GND
120Ω
–15V
R1 V
REF
270Ω
LT1027
V
FS
15V
LTC221/222 • TA01
U
U
U
2212fa
1
LTC221/LTC222
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
IN1 1
D1 2
S1 3
V
–
4
16 IN2
15 D2
14 S2
13 V
+
12 WR
11 S3
10 D3
9
IN3
Voltages Referenced to V
–
V
+ ...........................................................................................
44V
GND ..................................................................... 25V
Digital Inputs, S, D (Note 2) .......... – 2V to (V
+
2V) or
Digital Inputs, S, D (N2020mA,
Whichever Occurs First
Current
Any Input Except S or D ................................... 30mA
Continuous S or D ............................................ 20mA
Peak S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) ......... 70mA
ESD Susceptibility (Note 3) ...................................... 4kV
Power Dissipation (Plastic) ............................... 500mW
Power Dissipation (Ceramic) ............................. 900mW
Operating Temperature Range
LTC221C/LTC222C .................................. 0°C to 70°C
LTC221M/LTC222M
(OBSOLETE).......–55°C
to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
GND 5
S4 6
D4 7
IN4 8
ORDER PART
NUMBER
LTC221CN
LTC221CS
LTC222CN
LTC222CS
N PACKAGE
16-LEAD PDIP
J
MAX
= 110°C,
θ
JA
= 120°C/W
S PACKAGE
16-LEAD PLASTIC SO
J
MAX
= 110°C,
θ
JA
= 130°C/W
J PACKAGE
16-LEAD CERDIP
OBSOLETE PACKAGE
Consider the N or S Package for Alternate Source
LTC221MJ
LTC221CJ
LTC222MJ
LTC222CJ
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LOGIC TABLE
INX
0
1
X
WR
0
0
1
LTC221
On
Off
Maintain Previous State
LTC222
Off
On
Maintain Previous State
DIGITAL A D DC ELECTRICAL CHARACTERISTICS
The
●
denotes the specifications which apply
+
–
over full operating temperature range, otherwise specifications are at T
A
= 25
°
C. V =
±15V,
V = –15V, GND = 0V, unless noted.
PARAMETER
Analog Signal Range
R
ON
CONDITIONS
●
LTC221M/LTC222M
MIN
TYP
MAX
±15
90
90
135
±1
±100
±1
±100
±1
±200
LTC221C/LTC222C
MIN
TYP
MAX
±15
90
90
135
±5
±100
±5
±100
±5
±200
0.8
±1
5
12
30
16
UNITS
V
Ω
Ω
Ω
nA
nA
nA
nA
nA
nA
V
V
µA
pF
pF
pF
µA
µA
2212fa
V
S
=
±10V
I
D
= 1mA
Off Input Leakage I
S
(OFF)
Off Output Leakage I
D
(0FF)
On Channel Leakage l
D
(ON)
Input High Voltage V
INH
, V
WRH
Input Low Voltage V
INL
, V
WRL
Input High or Low Current
I
INH
, I
INL
, I
WRH
, I
WRL
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
I
+
T
MIN
25°C
T
MAX
V
D
= 14V, V
S
=
±14V
●
65
0.01
0.01
●
65
0.01
0.01
0.02
2.4
V
IN
= 2.4V, LTC221
V
IN
= 0.8V, LTC222
V
D
= V
S
=
±14V,
V
IN
= 2.4V, LTC222
V
IN
= 0.8V, LTC221
0.02
●
●
●
2.4
0.8
±1
5
12
30
16
V
IN
= 15V, 0V
V
WR
= 15V, 0V
●
All Channels On or Off
V
IN
= V
WR
= 0V or 4.0V
●
40
60
40
60
2
U
W
U
U
W W
W
U
LTC221/LTC222
DIGITAL A D DC ELECTRICAL CHARACTERISTICS
The
–
●
denotes the specifications which apply
+
over full operating temperature range, otherwise specifications are at T
A
= 25
°
C. V =
±15V,
V = –15V, GND = 0V, unless noted.
CONDITIONS
●
PARAMETER
I
–
AC ELECTRICAL CHARACTERISTICS
V
+
= 15V, V
–
= –15V, GND = 0V, unless otherwise noted.
PARAMETER
t
ON
t
OFF
t
OPEN
Off Isolation
Crosstalk
Charge Injection O
INJ
Total Harmonic Distortion THD
t
ON
, WR
t
OFF
, WR
V
S
= 2Vp-p, R
L
= 1kΩ
f = 100kHz
R
GEN
= 0Ω, C
L
= 1000pF, V
GEN
= 0
V
S
= 2Vp-p, R
L
= 10kΩ
V
S
= 2V, R
L
= 1kΩ, C
L
= 35pF
20
CONDITIONS
V
S
= 2V, R
L
= 1kΩ, C
L
= 35pF
LTC221M/LTC222M
MIN
TYP
MAX
290
210
85
75
90
5
0.01
270
160
400
300
±25
400
300
20
LTC221C/LTC222C
MIN
TYP
MAX
290
210
85
75
90
8
0.01
270
160
400
300
±25
pC
%
ns
400
300
ns
dB
UNITS
ns
over full operating temperature range, otherwise specifications are at T
A
= 25
°
C. V = 5V, V = GND = 0V, unless noted.
PARAMETER
Analog Signal Range
R
ON
V
S
= 1.5V, 3V
I
D
= 0.25mA
Off Input Leakage I
S
(OFF)
Off Output Leakage I
D
(0FF)
●
DIGITAL A D DC ELECTRICAL CHARACTERISTICS
The
●
denotes the specifications which apply
+
–
CONDITIONS
●
On Channel Leakage l
D
(ON)
Input High Voltage V
INH
, V
WRH
Input Low Voltage V
INL
, V
WRL
Input High or Low Current
I
INH
, I
INL
, I
WRH
, I
WRL
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
I
+
U
U
LTC221M/LTC222M
MIN
TYP
MAX
0.1
5
10
LTC221C/LTC222C
MIN
TYP
MAX
0.1
5
10
UNITS
µA
LTC221M/LTC222M
MIN
TYP
MAX
0
280
0.01
●
LTC221C/LTC222C
MIN
TYP
MAX
0
280
0.01
0.01
0.01
2.4
5
520
520
650
±5
±100
±5
±100
±5
±200
0.8
±1
5
12
30
UNITS
V
Ω
Ω
Ω
nA
nA
nA
nA
nA
nA
V
V
µA
pF
pF
pF
5
450
450
650
±1
±100
0.01
±1
±100
0.01
±1
±200
T
MIN
25°C
T
MAX
V
D
= 4V, 1V; V
S
= 1V, 4V
(Note 4)
V
D
= V
S
= 1V, 4V
(Note 4)
●
●
●
2.4
0.8
±1
5
12
30
V
IN
= 5V, 0V
V
WR
= 5V, 0V
●
All Channels On or Off
V
IN
= V
WR
= 0V or 4.0V
●
8
20
30
8
20
30
µA
µA
2212fa
3
LTC221/LTC222
AC ELECTRICAL CHARACTERISTICS
PARAMETER
t
ON
t
OFF
t
OPEN
Off Isolation
Crosstalk
Charge Injection O
INJ
Total Harmonic Distortion THD
t
ON
, WR
t
OFF
, WR
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Signals on S, D, or IN exceeding V
+
or V
–
will be clamped by
internal diodes. Limit forward diode current to maximum current rating.
V
S
= 2V
P-P
, R
L
= 1kΩ
f = 100kHz
R
GEN
= 0Ω, C
L
= 1000pF, V
GEN
= 2.5V
V
S
= 2V
P-P
, R
L
= 10kΩ
V
S
= 2V, R
L
= 1kΩ, C
L
= 35pF
100
CONDITIONS
V
S
= 2V, R
L
= 1kΩ, C
L
= 35pF
V
+
= 5V, V
–
= GND = 0V, unless otherwise noted.
LTC221M/LTC222M
MIN
TYP
MAX
450
190
250
75
90
2
0.01
430
160
600
300
600
300
100
LTC221C/LTC222C
MIN
TYP
MAX
450
190
250
75
90
2
0.01
430
160
600
300
600
300
UNITS
ns
ns
ns
dB
dB
pC
%
ns
ns
Note 3:
In-circuit ESD on the switch pins (S or D) exceeds 4kV (see test
circuit).
Note 4:
Leakage current with a 5V supply is guaranteed by correlation with
the
±15V
leakage current.
TYPICAL PERFOR A CE CHARACTERISTICS
R
ON
vs V
S
Over Supply Voltage
250
200
T
A
= 25°C
I
D
= 1mA
V
SUPPLY
= 5V, OV
100
80
R
ON
(Ω)
R
ON
(Ω)
R
ON
(Ω)
150
±5V
100
±10V
50
±15V
±20V
0
–20 –16 –12 –8 –4
0 4
V
S
(V)
8
12 16 20
LTC221/222 • TPC01
Positive Supply Current vs
Logic Input Voltage
250
ALL LOGIC INPUTS
TIED TOGETHER
200
V
+
= 15V
V
–
= –15V
T
A
= 25°C
150
I
+
(µA)
ALL I
NX
TIED TOGETHER
WR TIED TO GROUND
100
I
+
(µA)
50
0
0
3
4
U W
6
V
IN
(V)
9
R
ON
vs V
S
Over Temperature
125°C
R
ON
vs V
S
Over Temperature
V
+
= 5V
500
V
–
= 0V
I
D
= 1mA
400
125°C
60
40
25°C
300
200
25°C
–55°C
–55°C
20
V
+
= 15V
V
–
= –15V
I
D
= 1mA
100
0
–15 –12 –9 –6 –3
0
0
3
6
9
12 15
0
1
2
V
S
(V)
3
4
5
V
S
(V)
LTC221/222 • TPC02
LTC221/222 • TPC03
Positive Supply Current vs
Logic Input Voltage
250
V
+
= 5V
V
–
= 0V
T
A
= 25°C
ALL LOGIC INPUTS
TIED TOGETHER
200
150
ALL I
NX
TIED TOGETHER
WR TIED TO GROUND
100
50
12
15
0
0
1
2
V
IN
(V)
3
4
5
2212fa
LTC221/222 • TPC04
LTC221/222 • TPC05
LTC221/LTC222
APPLICATIO S I FOR ATIO
Switching Time Test Circuit
Switch output waveform shown for V
S
= constant with
logic input waveform as shown. Note that V
S
may be (+)
or (–) as per switching time test circuit. V
O
is the steady
LTC222
LOGIC INPUT 3V
t
r
< 20ns
t
r
< 20ns OV
LTC221
LOGIC INPUT 3V
t
r
< 20ns
t
r
< 20ns OV
SWITCH
INPUT
V
S
LOGIC "1" = SW ON
50%
LOGIC "0" = SW ON
50%
V
O
t
ON
0.9
V
O
t
OFF
SWITCH
OV
OUTPUT
LTC221/222 • AI01
R
GEN
SX
DX
V
O
C
L
= 1000pF
INX
V
GEN
LTC221/222 • AI03
OIRR-Off Isolation Test Circuit
C
15V
SIGNAL
GENERATOR
V
S
= 2V
P-P
f = 100kHz
CHAN A
ANALYZER
CHAN B
R
L
1k
C = 0.001µF//0.1µF
CHIP CAPACITORS
V
S
V
D
V
S
V
+
INX
V
D
GND
V
–
OIRR = 20 LOG
C
–15V
LTC221/222 • AI05
U
state output switch on. Feedthrough via gate capacitance
may result in spikes at leading and trailing edge of output
waveform.
Switching Time Test Circuit
SWITCH
INPUT
V
S
= 2V
IN1
LOGIC
INPUT
R
L
1k
S1
D1
SWITCH
OUTPUT
V
O
C
L
35pF
V
O
= V
S
R
L
R
L
+ R
DS(ON)
W
U U
0.9
(REPEAT TEST FOR IN2, IN3 AND IN4)
LTC221/222 • AI02
Charge Injection Test Circuit
∆V
O
V
O
3V
LTC221 INX
OV
3V
LTC222 INX
OV
ON
ON
OFF
OFF
ON
ON
∆V
O
IS THE MEASURED VOLTAGE ERROR DUE TO CHARGE INJECTION.
THE ERROR VOLTAGE IN COULOMBS IS
∆Q
= V
L
•
∆V
O
LTC221/222 • AI04
CCRR-Channel to Channel Crosstalk Test Circuit
C
15V
SIGNAL
GENERATOR
V
S
= 2Vp-p
f = 100kHz
V
IN
V
S1
V
+
V
L
V
D1
50Ω
IN1
CHAN A
ANALYZER
CHAN B
V
IN
R
L
1k
C = 0.001µF//0.1µF
CHIP CAPACITORS
V
S1
V
D2
IN2
V
IN
V
D2
GND
V
–
V
S2
NC
OIRR = 20 LOG
C
–15V
LTC221/222 • AI06
2212fa
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
