EXPOSED PAD (PIN 21) IS PGND, MUST BE SOLDERED TO PCB
FE PACKAGE
20-LEAD PLASTIC TSSOP
T
JMAX
= 150°C,
θ
JA
= 38°C/W
EXPOSED PAD (PIN 21) IS PGND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LTC3612EUDC#PBF
LTC3612IUDC#PBF
LTC3612HUDC#PBF
LTC3612MPUDC#PBF
LTC3612EFE#PBF
LTC3612IFE#PBF
LTC3612HFE#PBF
LTC3612MPFE#PBF
TAPE AND REEL
LTC3612EUDC#TRPBF
LTC3612IUDC#TRPBF
LTC3612HUDC#TRPBF
LTC3612MPUDC#TRPBF
LTC3612EFE#TRPBF
LTC3612IFE#TRPBF
LTC3612HFE#TRPBF
LTC3612MPFE#TRPBF
PART MARKING*
LDQT
LDQT
LDQT
LDQT
LTC3612FE
LTC3612FE
LTC3612FE
LTC3612FE
PACKAGE DESCRIPTION
20-Lead (3mm
×
4mm) Plastic QFN
20-Lead (3mm
×
4mm) Plastic QFN
20-Lead (3mm
×
4mm) Plastic QFN
20-Lead (3mm
×
4mm) Plastic QFN
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
2
3612fc
For more information
www.linear.com/LTC3612
LTC3612
elecTrical characTerisTics
SYMBOL
V
IN
V
UVLO
V
FB
PARAMETER
Operating Voltage Range
Undervoltage Lockout Threshold
Feedback Voltage Internal Reference
SV
IN
Ramping Down
SV
IN
Ramping Up
(Notes 3, 4) V
TRACK/SS
= SV
IN
, V
DDR
= 0V
0°C < T
J
< 85°C
–40°C < T
J
< 125°C
–55°C < T
J
< 150°C
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 3.3V, RT/SYNC = SV
IN
, unless otherwise specified.
CONDITIONS
l
l
l
MIN
2.25
1.7
TYP
MAX
5.5
2.25
UNITS
V
V
V
V
V
V
V
V
nA
%/V
%
%
µA
µA
µA
µA
mΩ
mΩ
l
l
0.594
0.591
0.589
0.289
0.489
0.6
0.606
0.609
0.611
0.311
0.511
±30
0.2
0.25
2.6
Feedback Voltage External Reference (Notes 3, 4) V
TRACK/SS
= 0.3V, V
DDR
= SV
IN
(Note 7)
(Notes 3, 4) V
TRACK/SS
= 0.5V, V
DDR
= SV
IN
I
FB
∆V
LINEREG
∆V
LOADREG
I
S
Feedback Input Current
Line Regulation
Load Regulation
Active Mode
Sleep Mode
V
FB
= 0.6V
SV
IN
= PV
IN
= 2.25V to 5.5V
(Notes 3, 4) TRACK/SS = SV
IN
ITH from 0.5V to 0.9V (Notes 3, 4)
V
ITH
= SV
IN
(Note 5)
V
FB
= 0.5V, V
MODE
= SV
IN
(Note 6)
V
FB
= 0.7V, V
MODE
= 0V, ITH = SV
IN
(Note 5)
V
FB
= 0.7V, V
MODE
= 0V (Note 4)
Shutdown
R
DS(ON)
I
LIM
Top Switch On-Resistance
Bottom Switch On-Resistance
Top Switch Current Limit
SV
IN
= PV
IN
= 5.5V, V
RUN
= 0V
PV
IN
= 3.3V (Note 10)
PV
IN
= 3.3V (Note 10)
Sourcing (Note 8), V
FB
= 0.5V
Duty Cycle <35%
Duty Cycle = 100%
Sinking (Note 8), V
FB
= 0.7V,
Forced Continuous Mode
–5µA < I
ITH
< 5µA (Note 4)
(Note 4)
V
FB
from 0.06V to 0.54V,
TRACK/SS = SV
IN
(Note 7 )
l
l
0.3
0.5
1100
70
120
0.1
70
45
5.2
3.7
–3
6
–4
200
±30
0.65
0.62
70
200
1
1.5
6.8
–5
100
160
1
A
A
A
µS
µA
ms
V
µs
Ω
MHz
MHz
MHz
V
V
µA
V
V
V
V
V
3612fc
Bottom Switch Current Limit
g
m(EA)
I
EAO
t
SS
V
TRACK/SS
t
TRACK/SS_DIS
Error Amplifier Transconductance
Error Amplifier Max Output Current
Internal Soft-Start Time
Enable Internal Soft-Start
Soft-Start Discharge Time at
Start-Up
R
ON(TRACK/SS_DIS)
TRACK/SS Pull-Down Resistor at
Start-Up
f
OSC
f
SYNC
V
RT/SYNC
I
SW(LKG)
V
DDR
V
MODE
(Note 9)
Oscillator Frequency
Internal Oscillator Frequency
Synchronization Frequency
SYNC Level High
SYNC Level Low
Switch Leakage Current
DDR Option Enable Voltage
Internal Burst Mode Operation
Pulse-Skipping Mode
Forced Continuous Mode
External Burst Mode Operation
SV
IN
– 0.3
1.1
0.45
SV
IN
= PV
IN
= 5.5V, V
RUN
= 0V
SV
IN
– 0.3
RT/SYNC = 370k
V
RT/SYNC
= SV
IN
l
l
0.8
1.8
0.3
1.2
.
1
2.25
1.2
2.7
4
0.3
0.1
1
0.3
SV
IN
• 0.58
0.8
For more information
www.linear.com/LTC3612
3
LTC3612
elecTrical characTerisTics
SYMBOL
PGOOD
PARAMETER
Power Good Voltage Windows
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 3.3V, RT/SYNC = SV
IN
, unless otherwise specified.
CONDITIONS
TRACK/SS = SV
IN
, Entering Window
V
FB
Ramping Up
V
FB
Ramping Down
TRACK/SS = SV
IN
, Leaving Window
V
FB
Ramping Up
V
FB
Ramping Down
MIN
–3.5
3.5
TYP
–6
6
9
–9
70
8
Input High
Input Low
l
l
MAX
UNITS
%
%
11
–11
140
33
0.4
%
%
µs
Ω
V
V
t
PGOOD
R
PGOOD
V
RUN
Power Good Blanking Time
Power Good Pull-Down On-Resistance
RUN Voltage
Entering and Leaving Window
105
17
1
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3612 is tested under pulsed load conditions such that
T
J
≈
T
A
. The LTC3612E is guaranteed to meet performance specifications
from 0°C to 85°C junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3612I is guaranteed over the full –40°C to 125°C operating
junction temperature range. The LTC3612H is guaranteed to meet
specifications over the –40°C to 150°C operating temperature range. The
LTC3612MP is guaranteed and tested to meet specifications over the full
–55°C to 150°C operating temperature range. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
temperature
(T
J
, in °C) is calculated from the ambient temperature (T
A
, in °C) and
power dissipation (P
D
, in watts) according to the formula:
T
J
= T
A
+ (P
D
•
θ
JA
),
where
θ
JA
(in °C/W) is the package thermal impedance.
Note 3:
This parameter is tested in a feedback loop which servos V
FB
to
the midpoint for the error amplifier (V
ITH
= 0.75V).
Note 4:
External compensation on ITH pin.
Note 5:
Tying the ITH pin to SV
IN
enables the internal compensation and
AVP mode.
Note 6:
Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 7:
See description of the TRACK/SS pin in the Pin Functions section.
Note 8:
In sourcing mode the average output current is flowing out of SW
pin. In sinking mode the average output current is flowing into the SW Pin.
Note 9:
See description of the MODE pin in the Pin Functions section.
Note 10:
Guaranteed by correlation and design to wafer level
measurements for QFN packages.
Note 11:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
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