drivers designed for clock distribution in new, high-
performance ECL systems. They accept one differential or
single-ended input, with V
BB
used for single-ended
operation. The signal is fanned out to nine identical
differential outputs. An enable input is also provided such
that a logic HIGH disables the device by forcing all Q
outputs LOW and all /Q outputs HIGH.
The device is specifically designed and produced for low
skew. The interconnect scheme and metal layout are
carefully optimized for minimal gate-to-gate skew within
the device. Wafer characterization and process control
ensure consistent distribution of propagation delay from lot
to lot. Since the E111 shares a common set of “basic”
processing with the other members of the ECLinPS™
family, wafer characterization at the point of device
personalization allows for tighter control of parameters,
including propagation delay.
To ensure that the skew specification is met, it is
necessary that both sides of the differential output are
terminated into 50Ω, even if only one side is being used. ln
most applications, all nine differential pairs will be used
and, therefore, terminated. In the case where fewer than
nine pairs are used, it is necessary to terminate at least the
output pairs on the same package side (i.e. sharing the
same V
CCO
as the pair(s) being used on that side) in order
to maintain minimum skew.
The V
BB
output is intended for use as a reference
voltage for single-ended reception of ECL signals to that
device only. When using V
BB
for this purpose, it is
recommended that V
BB
is decoupled to V
CC
via a 0.01µF
capacitor.
s
V
BB
output
s
Enable input
s
Fully compatible with industry standard 10KH, 100K
I/O levels
s
75K
Ω
input pulldown resistors
s
Fully compatible with ON Semiconductor
MC10E/100E111
s
Available in 28-pin PLCC package
BLOCK DIAGRAM
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
IN
IN
EN
Q
5
Q
6
Q
4
Q
4
Q
5
PIN NAMES
Pin
Function
Differential Input Pair
Enable Input
Differential Outputs
V
BB
Output
V
CC
to Output
Q
6
Q
7
Q
7
Q
8
V
BB
Q
8
IN, /IN
/EN
Q0, /Q0 — Q8, /Q8
V
BB
V
CCO
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
Rev.: E
Amendment: /0
1
Issue Date: March 2006
Micrel, Inc.
SY10E111
SY100E111
PACKAGE/ORDERING INFORMATION
/Q
0
Q
1
V
CCO
Ordering Information
(1)
/Q
1
/Q
2
Q
2
Q
0
Part Number
25 24 23 22 21 20 19
Package
Type
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
J28-1
Operating
Range
Industrial
Industrial
Industrial
Industrial
Commercial
Commercial
Commercial
Commercial
Industrial
Industrial
Industrial
Industrial
Package
Marking
SY10E111JI
SY10E111JI
SY100E111JI
SY100E111JI
SY10E111JC
SY10E111JC
SY100E111JC
SY100E111JC
SY10E111JY with
Pb-Free bar-line indicator
SY10E111JY with
Pb-Free bar-line indicator
SY100E111JY with
Pb-Free bar-line indicator
SY100E111JY with
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Matte-Sn
Matte-Sn
Matte-Sn
Matte-Sn
V
EE
/EN
IN
V
CC
/IN
V
BB
NC
26
27
28
1
2
3
4
5
6
7
8
9
10 11
18
17
Q
3
/Q
3
Q
4
V
CCO
/Q
4
Q
5
/Q
5
SY10E111JI
SY10E111JITR
(2)
SY100E111JI
SY100E111JITR
(2)
SY10E111JC
SY10E111JCTR
(2)
SY100E111JC
SY100E111JCTR
(2)
SY10E111JY
(3)
PLCC
TOP VIEW
J28-1
16
15
14
13
12
/Q
8
Q
8
/Q
7
Q
7
28-Pin PLCC (J28-1)
SY10E111JYTR
(2, 3)
SY100E111JY
(3)
SY100E111JYTR
(2, 3)
Notes:
V
CCO
/Q
6
Q
6
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
TIMING DIAGRAMS
IN
/IN
t
s
/EN
50%
/EN
/Q
Q
75 mV
Figure 1. Set-up Time
Figure 2. Hold Time
IN
/IN
t
H
50%
75 mV
/Q
Q
75 mV
75 mV
IN
/IN
t
r
/EN
50%
/Q
Q
Figure 3. Release Time
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
SY10E111
SY100E111
DC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= –40
°
C
Symbol
V
BB
Parameter
Output Reference
Voltage
10E
100E
Input HIGH Current
Power Supply
Current
10E
100E
Min.
Typ.
Max.
Min.
–1.38
–1.38
—
—
—
T
A
= 0
°
C
Typ.
—
—
—
48
48
Max.
T
A
= +25
°
C
Min.
Typ.
—
—
—
48
48
Max.
T
A
= +85
°
C
Min.
Typ.
—
—
—
48
55
Max.
–1.19
–1.26
150
60
69
µA
mA
60
60
—
—
60
60
—
—
Unit
V
–1.27 –1.35
–1.26 –1.38
150
—
–1.25 –1.31
–1.26 –1.38
150
—
I
IH
I
EE
AC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= –40
°
C
Symbol
t
PD
Parameter
Propagation Delay to
Output
IN (differential)
(1)
IN (single-ended)
(2)
Enable
(3)
Disable
(3)
Within-Device Skew
(4)
Set-up Time
/EN to IN
(5)
Hold Time
IN to /EN
(6)
Release Time
/EN to IN
(7)
Minimum Input Swing
(8)
Common Mode Range
(9)
Rise/Fall Times
(20% to 80%)
Min.
Typ.
Max.
Min.
T
A
= 0
°
C
Typ.
Max.
T
A
= +25
°
C
Min.
Typ.
Max.
T
A
= +85
°
C
Min.
Typ.
Max.
Unit
ps
430
330
450
450
—
200
0
300
250
–1.6
275
—
—
—
—
25
0
–200
100
—
—
375
630
730
850
850
50
—
—
—
—
–0.4
600
430
330
450
450
—
200
0
300
250
–1.6
275
—
—
—
—
25
0
–200
100
—
—
375
630
730
850
850
50
—
—
—
—
–0.4
600
430
330
450
450
—
200
0
300
250
–1.6
275
—
—
—
—
25
0
–200
100
—
—
375
630
730
850
850
50
—
—
—
—
–0.4
600
ps
ps
ps
ps
mV
V
ps
t
SKEW
t
S
t
H
t
R
V
PP
V
CMR
t
r
t
f
Notes:
1. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential
output signals.
2. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
3. Enable is defined as the propagation delay from the 50% point of a
negative
transition on /EN to the 50% point of a
positive
transition on Q (or a negative
transition on /Q). Disable is defined as the propagation delay from the 50% point of a
positive
transition on /EN to the 50% point of a
negative
transition
on Q (or a positive transition on /Q).
4. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.
5. The set-up time is the minimum time that /EN must be asserted prior to the next transition of /IN/IN to prevent an output response greater than
±75mV
to that /IN/IN transition (see Figure 1).
6. The hold time is the minimum time that /EN must remain asserted after a negative going IN or a positive going /IN to prevent an output response greater
than
±75mV
to that IN, /IN transition (see Figure 2).
7. The release time is the minimum time that /EN must be de-asserted prior to the next IN, /IN transition to ensure an output response that meets the specified
IN to Q propagation delay and output transition times (see Figure 3).
8. V
PP
(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The V
PP
(min.) is AC limited for the
E111, as a differential input as low as 50mV will still produce full ECL levels at the output.
9. V
CMR
is defined as the range within which the V
IH
level may vary, with the device still meeting the propagation delay specification. The V
IL
level must be
such that the peak-to-peak voltage is less than 1.0V and greater than or equal to V
PP
(min.).
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
SY10E111
SY100E111
28-PIN PLCC (J28-1)
Rev. 03
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
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the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
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