3-BIT 4:1
MUX-LATCH
SY10E256
SY100E256
FEATURES
s
950ps max. data to output
s
Extended 100E V
EE
range of –4.2V to –5.5V
s
s
s
s
850ps max. latch enable to output
Separate select controls
Differential outputs
Fully compatible with industry standard 10KH,
100K ECL levels
s
Internal 75K
Ω
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E256
s
Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E256 offer three 4:1 multiplexers followed
by latches with differential outputs designed for use in new,
high-performance ECL systems. Separate Select controls
are provided for the leading 2:1 mux pairs (see block
diagram).
When the Latch Enable (LEN) is at a logic LOW, the latch
is transparent and output data is controlled by the multiplexer
select controls. A logic HIGH on LEN latches the outputs.
The Master Reset (MR) overrides all other controls to set
the Q outputs LOW.
BLOCK DIAGRAM
D
0a
D
0b
D
0c
D
0d
PIN CONFIGURATION
V
CCO
18
17
16
D
1b
D
1a
D
2d
D
2c
D
2b
D
E
N R
Q
0
Q
0
SEL
1A
SEL
1B
26
27
28
1
2
3
4
25 24 23 22 21 20 19
D
2a
D
1a
D
1b
D
1c
D
1d
Q
2
Q
2
V
CC
Q
1
Q
1
V
CCO
Q
0
D
E
N R
Q
1
Q
1
SEL
2
V
EE
LEN
MR
D
1c
TOP VIEW
PLCC
J28-1
15
14
13
12
SEL
1A
SEL
1B
SEL
2
LEN
MR
PIN NAMES
Pin
D
0x
–D
2x
SEL
1A
, SEL
1B
SEL
2
LEN
MR
Q
0
, Q
0
–Q
2
, Q
2
V
CCO
Function
Parallel Data Inputs
First-stage Select Inputs
Second-stage Select Input
Latch Enable
Master Reset
Data Outputs
V
CC
to Output
V
CCO
Q
0
Rev.: C
D
0a
D
0b
D
0c
D
1d
D
0d
D
2a
D
2b
D
2c
D
2d
D
E
N R
Q
2
Q
2
5
6
7
8
9
10 11
Amendment: /1
1
Issue Date: February, 1998
Micrel
SY10E256
SY100E256
TRUTH TABLE
Pin
SEL
2
SEL
1A
SEL
1B
State
H
H
H
Operation
Output c/d Data
Input d Data
Input b Data
DC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 0
°
C
Symbol
I
IH
I
EE
Parameter
Input HIGH Current
Power Supply Current
10E
100E
—
—
69
69
83
83
—
—
69
69
83
83
—
—
69
79
83
96
—
—
150
T
A
= +25
°
C
—
—
150
T
A
= +85
°
C
Max.
150
Unit
µA
mA
Condition
—
—
—
—
Min. Typ. Max. Min. Typ.
Max. Min. Typ.
AC ELECTRICAL CHARACTERISTICS
V
EE
= V
EE
(Min.) to V
EE
(Max.); V
CC
= V
CCO
= GND
T
A
= 0
°
C
Symbol
t
PLH
t
PHL
Parameter
Propagation Delay to Output
D
SEL
1
SEL
2
LEN
MR
Set-up Time
D
SEL
1
SEL
2
Hold Time
D
SEL
1
SEL
2
Reset Recovery Time
Minimum Pulse Width, MR
Within-Device Skew
Rise/Fall Time
20% to 80%
T
A
= +25
°
C
T
A
= +85
°
C
Max.
900
1050
900
800
825
ps
400
600
500
300
100
200
700
400
—
275
275
300
250
–275
–300
–250
600
—
50
475
—
—
—
—
—
—
—
—
—
700
400
600
500
300
100
200
700
400
—
275
275
300
250
–275
–300
–250
600
—
50
475
—
—
—
—
—
—
—
—
—
700
400
600
500
300
100
100
700
400
—
275
275
300
250
–275
–300
–250
600
—
50
475
—
—
—
ps
—
—
—
—
—
—
700
ps
ps
ps
ps
—
—
1
—
—
—
Unit
ps
400
550
450
350
350
600
775
650
500
600
900
1050
900
800
825
400
550
450
350
350
600
775
650
500
600
900
1050
900
800
825
400
550
450
350
350
600
775
650
500
600
Condition
—
Min. Typ. Max. Min. Typ.
Max. Min. Typ.
t
S
t
H
t
RR
t
PW
t
skew
t
r
t
f
NOTE:
1. Within-device skew is defined as identical transitions on similar paths
through a device.
PRODUCT ORDERING CODE
Ordering
Code
SY10E256JC
SY10E256JCTR
SY100E256JC
SY100E256JCTR
2
Package
Type
J28-1
J28-1
J28-1
J28-1
Operating
Range
Commercial
Commercial
Commercial
Commercial
Micrel
SY10E256
SY100E256
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
FAX
+ 1 (408) 980-9191
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
4
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