SY100EL14V
5V/3.3V 1:5 Clock Distribution
General Description
The SY100EL14V is a low-skew, 1:5 clock distribution chip
designed explicitly for low-skew clock distribution
applications. The device can be driven by either a
differential or single-ended ECL or, if positive power
supplies are used, PECL input signal. The EL14V is
suitable for operation in systems operating with 3.3V to
5.0V supplies. If a single-ended input is to be used, the
V
BB
output should be connected to the /CLK input and
bypassed to ground via a 0.01µF capacitor. The V
BB
output
is designed to act as the switching reference for the input
of the EL14V under single-ended input conditions. As a
result, this pin can only source/sink up to 0.5mA of current.
The EL14V features a multiplexed clock input to allow for
the distribution of a lower speed scan or test clock along
with the high speed system clock. When LOW (or left open
and pulled LOW by the input pull-down resistor), the SEL
pin will select the differential clock input.
The common enable (/EN) is synchronous, so that the
outputs will only be enabled/disable when they are already
in the LOW state. This avoids any chance of generating a
runt clock pulse when the device is enabled/disabled as
can happen with an asynchronous control. The internal
flip-flop is clocked on the falling edge of the input clock.
Therefore, all associated specification limits are referenced
to the negative edge of the clock input.
When both differential inputs are left open, CLK input will
pull down to V
EE
and /CLK input will bias around V
CC
/2.
Datasheets and support documentation are available on
Micrel’s web site at:
www.micrel.com.
Features
•
•
•
•
•
•
•
•
3.3V and 5V power supply options
70fs
RMS
typical additive phase jitter
Typical 30ps output-to-output skew
Max. 50ps output-to-output skew
Synchronous enable/disable
Multiplexed clock input
75kΩ internal input pull-down resistors
Available in 20-pin SOIC package
Applications
•
•
•
•
Processor clock distribution
SONET clock distribution
Fibre Channel clock distribution
Gigabit Ethernet clock distribution
Block Diagram
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
October 16, 2014
Revision 5.0
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY100EL14V
Absolute Maximum Ratings
(4)
Input Voltage (V
IN
)
(V
CC
= 0V, V
IN
not more positive than V
CC
) .. –6V to +0V
(V
EE
= 0V, V
IN
not more positive than V
CC
)... +0V to +6V
(7)
Operating Range (V
EE
) .............................. –5.7V to –3.0V
Output Current (I
OUT
) Continuous ................................ 50mA
Surge....................................... 100mA
Lead Temperature (soldering, 20s) ............................ 260°C
Storage Temperature (T
s
) ............................. –65 to +150°C
(8)
ESD Rating ............................................................. >1.5kV
(6)
Operating Ratings
(5)
Supply Voltage (V
CC
) PECL Operation ............ 3.0V to 5.5V
(V
EE
) ECL Operation ........... –3.0V to –5.5V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
Junction Thermal Resistance
SOIC (θ
JA
) .......................................................... 58°C/W
DC Electrical Characteristics
(9)
V
EE
= V
EE
(min) to V
EE
(max); V
CC
= GND, T
A
= –40°C to +85°C, unless otherwise stated.
Outputs are terminated through a 50Ω resistor to V
CC
–2.0V.
Symbol
V
OH
Parameter
Output High Voltage
(10)
Condition
T
A
= –40°C
T
A
= 0°C to +85°C
T
A
= –40°C
T
A
= 0°C to +85°C
(10)
Min.
V
CC
– 1.085
V
CC
– 1.025
V
CC
– 1.830
V
CC
– 1.810
V
CC
– 1.095
V
CC
– 1.035
Typ.
V
CC
– 1.005
V
CC
– 0.955
V
CC
– 1.695
V
CC
– 1.705
Max.
V
CC
– 0.880
V
CC
– 0.880
V
CC
– 1.555
V
CC
– 1.620
Units
V
V
V
V
V
V
V
OL
Output Low Voltage
(10)
V
OHA
Output High Voltage
T
A
= –40°C
T
A
= 0°C to +85°C
T
A
= –40°C
T
A
= 0°C to +85°C
V
OLA
V
IH
V
IL
I
IL
I
IH
I
EE
V
BB
Notes:
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Low Current
(10)
V
CC
– 1.555
V
CC
– 1.610
V
CC
– 1.165
V
CC
– 1.810
V
CC
– 0.880
V
CC
– 1.475
V
V
V
V
µA
(11)
Input LOW Current
/CLK
0.5
–300
150
Input High Current
Power Supply Current
Output Reference Voltage
T
A
= –40°C to +25°C
T
A
= +85°C
V
CC
– 1.380
32
34
µA
mA
V
40
42
V
CC
– 1.260
4. Exceeding the absolute maximum ratings may damage the device.
5. The device is not guaranteed to function outside its operating ratings.
6. In PECL mode operation, V
IN
(max) = V
CC
.
7. Parametric values specified at 100EL14V series: –3.0V to –5.5V.
8. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF.
9. Specification for packaged product only
10. V
IN
= V
IH
(max) or V
IL
(min).
11. V
IN
= V
IL
(max).
October 16, 2014
3
Revision 5.0
tcghelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY100EL14V
AC Electrical Characteristics
V
EE
= V
EE
(min) to V
EE
(max); V
CC
= GND, T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
T
A
= –40°C
Propagation Delay
CLK to Q (Diff)
T
A
= 0°C
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
t
PLH
t
PHL
Propagation Delay
CLK to Q (SE)
T
A
= 0°C
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
Propagation Delay
SCLK to Q
T
A
= 0°C
T
A
= +25°C
T
A
= +85°C
t
skew
t
S
t
H
V
PP
Part-to-Part Skew
(12)
Min.
520
550
580
630
470
500
530
580
470
500
530
580
Typ.
Max.
720
750
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
mV
680
780
830
770
800
680
830
880
770
800
680
830
880
200
50
Within-Device Skew
Setup Time /EN
Hold Time /EN
Minimum Input Swing, CLK
V
PP
< 500mV
T
A
= –40°C
T
A
= 0°C to +85°C
T
A
= –40°C
T
A
= 0°C to +85°C
150
200
150
V
CC
– 2.000
V
CC
– 2.100
V
CC
– 1.800
V
CC
– 1.900
230
360
70
V
CC
– 0.400
V
CC
– 0.400
V
CC
– 0.400
V
CC
– 0.400
500
V
V
CMR
Common Mode Range
(13)
V
PP
≥ 500mV
t
r
/t
f
Output Rise/Fall Time
Q (20% - 80%)
V
ps
T
A
= –40°C to +85°C
Typical value at T
A
= +25°C
Carrier = 622MHz
Integration Range: 12kHz to 20MHz
Carrier = 156.25MHz
Integration Range: 12kHz to 20MHz
t
JITTER
Additive Jitter
fs
RMS
155
Notes:
12. Skews are specified for identical LOW-to-HIGH or HIGH-to-LOW transitions.
13. The V
CMR
range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the
specified range and the peak-to-peak voltage lies between V
PP
(min) and 1V. The lower end of the V
CMR
range varies 1:1 with V
EE
. The numbers in
the specification table assume a nominal V
EE
of 3.3V. For PECL operation, the V
CMR
(min) will be fixed at 3.3V – |V
CMR
(min)|.
October 16, 2014
4
Revision 5.0
tcghelp@micrel.com
or (408) 955-1690
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