NVMFD5C668NL
Power MOSFET
60 V, 6.5 mW, 68 A, Dual N−Channel
Features
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
NVMFD5C668NLWF − Wettable Flank Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R
qJC
(Notes 1, 2, 3)
Power Dissipation
R
qJC
(Notes 1, 2)
Continuous Drain
Current R
qJA
(Notes 1, 2, 3)
Power Dissipation
R
qJA
(Notes 1 & 2)
Pulsed Drain Current
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
T
L
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
60
±20
68
48
57.5
29
15.5
11
3.0
1.5
454
−55 to
+ 175
48
205
260
A
°C
A
mJ
°C
W
A
W
Unit
V
V
A
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V
(BR)DSS
60 V
R
DS(ON)
MAX
6.5 mW @ 10 V
I
D
MAX
68 A
9.2 mW @ 4.5 V
Dual N−Channel
D1
D2
G1
S1
G2
S2
MARKING
DIAGRAM
D1 D1
1
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, I
L(pk)
= 3.22 A)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
DFN8 5x6
(SO8FL)
CASE 506BT
S1
G1
S2
G2
XXXXXX
AYWZZ
D2 D2
D1
D1
D2
D2
XXXXXX = 5C668L (NVMFD5C668NL) or
668LWF (NVMFD5C668NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
Symbol
R
qJC
R
qJA
Value
2.6
50.26
Unit
°C/W
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2017
1
May, 2018 − Rev. 0
Publication Order Number:
NVMFD5C668NL/D
NVMFD5C668NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/
T
J
I
DSS
V
GS
= 0 V,
V
DS
= 60 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
60
28
10
250
100
V
mV/°C
mA
nA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
I
GSS
V
DS
= 0 V, V
GS
= 20 V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
= V
DS
, I
D
= 50
mA
1.2
−5.3
2.0
V
mV/°C
V
GS
= 10 V
V
GS
= 4.5 V
I
D
= 20 A
I
D
= 20 A
5.4
7.4
61
6.5
9.2
mW
S
Forward Transconductance
g
FS
V
DS
= 15 V, I
D
= 20 A
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
SWITCHING CHARACTERISTICS
(Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
I
S
= 20 A
T
J
= 25°C
T
J
= 125°C
0.85
0.73
42
V
GS
= 0 V, dIS/dt = 100 A/ms,
I
S
= 20 A
20
22
32
nC
ns
1.2
V
t
d(ON)
t
r
t
d(OFF)
t
f
V
GS
= 10 V, V
DS
= 48 V,
I
D
= 20 A, R
G
= 1.0
W
10
22
40
7.0
ns
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
V
GP
V
GS
= 10 V, V
DS
= 48 V; I
D
= 20 A
V
GS
= 4.5 V, V
DS
= 48 V; I
D
= 20 A
V
GS
= 10 V, V
DS
= 48 V; I
D
= 20 A
V
GS
= 0 V, f = 1 MHz, V
DS
= 25 V
1440
800
14
9.8
21.3
2.5
4.3
2.1
2.9
V
nC
pF
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
t
RR
t
a
t
b
Q
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width
v
300
ms,
duty cycle
v
2%.
5. Switching characteristics are independent of operating junction temperatures.
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NVMFD5C668NL
TYPICAL CHARACTERISTICS
70
10 V to 3.6 V
60
I
D
, DRAIN CURRENT (A)
50
40
30
20
10
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
3.0 V
2.8 V
I
D
, DRAIN CURRENT (A)
3.2 V
30
25
20
15
10
5
0
0
1
2
T
J
= 125°C
T
J
= 25°C
T
J
= −55°C
3
4
5
35
V
DS
= 10 V
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (mW)
16
14
12
10
8
6
4
2
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
T
J
= 25°C
I
D
= 5 A
12
11
10
9
8
7
6
5
4
3
2
1
0
10
Figure 2. Transfer Characteristics
T
J
= 25°C
V
GS
= 4.5 V
V
GS
= 10 V
15
20
25
30
35
40
45
50
I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.9
R
DS(on)
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
1.7
1.5
1.3
1.1
0.9
0.7
−50
V
GS
= 10 V
I
D
= 20 A
I
DSS
, LEAKAGE (nA)
10K
100K
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 150°C
T
J
= 125°C
1K
T
J
= 85°C
100
−25
0
25
50
75
100
125
150
175
10
10
15
20
25
30
35
40
45
50
55
60
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFD5C668NL
TYPICAL CHARACTERISTICS
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
10000
C
ISS
C, CAPACITANCE (pF)
1000
C
OSS
100
10
9
8
7
6
5
4
3
2
1
0
0
5
10
15
20
25
Q
G
, TOTAL GATE CHARGE (nC)
V
DS
= 48 V
I
D
= 20 A
T
J
= 25°C
Q
GS
Q
GD
10
V
GS
= 0 V
T
J
= 25°C
f = 1 MHz
0
10
20
30
40
50
C
RSS
1
60
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
I
S
, SOURCE CURRENT (A)
20
18
16
14
12
10
8
6
4
2
0
0.5
t
d(off)
100
t, TIME (ns)
t
f
t
r
10
t
d(on)
Figure 8. Gate−to−Source Voltage vs. Total
Charge
V
GS
= 0 V
T
J
= 125°C
T
J
= 25°C T
J
= −55°C
1
1
10
R
G
, GATE RESISTANCE (W)
V
GS
= 10 V
V
DS
= 48 V
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
100
Figure 10. Diode Forward Voltage vs. Current
I
D
, DRAIN CURRENT (A)
100
10
10
T
C
= 25°C
V
GS
≤
10 V
Single Pulse
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1
10
10
ms
0.5 ms
1 ms
10 ms
100
1000
0.1
0.00001
I
PEAK
, (A)
T
J
(initial) = 25°C
1
T
J
(initial) = 100°C
1
0.1
0.0001
0.001
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE(V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
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NVMFD5C668NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
10
R
qJA
(°C/W)
20%
10%
5%
2%
1
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
NVMFD5C668NLT1G
NVMFD5C668NLWFT1G
Marking
5C668L
668LWF
Package
DFN8
(Pb−Free)
DFN8
(Pb−Free, Wettable Flanks)
Shipping
†
1500 / Tape & Reel
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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