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SIT3821AI-2D2-33EY100.000000Y

产品描述OSC VCXO 100.0000MHZ LVDS SMD
产品类别无源元件   
文件大小275KB,共7页
制造商SiTime
标准
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SIT3821AI-2D2-33EY100.000000Y概述

OSC VCXO 100.0000MHZ LVDS SMD

SIT3821AI-2D2-33EY100.000000Y规格参数

参数名称属性值
类型VCXO
频率100MHz
功能启用/禁用
输出LVDS
电压 - 电源3.3V
频率稳定度±25ppm
绝对牵引范围(APR)±770ppm
工作温度-40°C ~ 85°C
电流 - 电源(最大值)55mA
安装类型表面贴装
封装/外壳6-SMD,无引线
大小/尺寸0.276" 长 x 0.197" 宽(7.00mm x 5.00mm)
高度 - 安装(最大值)0.039"(1.00mm)
电流 - 电源(禁用)(最大值)35mA

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SiT3821
1-220 MHz High Performance Differential VCXO
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
Any frequency between 1 MHz and 220 MHz accurate to 6 decimal
places
Widest pull range options: ±25, ±50, ±100, ±150, ±200, ±400, ±800,
±1600 ppm
Superior pull range linearity of ≤ 1%, 10 times better than quartz
0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2 mm x 2.5 mm, 5.0 mm x 3.2 mm and
7.0 mm x 5.0 mm
For frequencies higher than 220 MHz, refer to SiT3822 datasheet
Ideal for SONET, Video, Instrumentation, Satellite applications
Telecom, networking, broadband
Electrical Characteristics
Parameter and Conditions
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-10
-25
-50
Operating Temperature Range
Start-up Time
Duty Cycle
Pull Range
Upper Control Voltage
Lower Control Voltage
Linearity
Frequency Change Polarity
Control Voltage Bandwidth (-3dB)
Vin Pin Input Impedance
First Year Aging
10-year Aging
Supply Voltage
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
OE Enable/Disable Time
RMS Period Jitter
Vdd
Idd
I_OE
I_leak
I-driver
VOH
VOL
V_Swing
Tr, Tf
T_oe
T_jitt
T_use
T_start
DC
PR
VC_U
VC_L
Lin
V_BW
Z_vin
100
-2
-5
2.97
2.25
Vdd-1.1
Vdd-1.9
1.2
-40
-20
45
Typ.
Max.
220
+10
+25
+50
+85
+70
10
55
Unit
MHz
ppm
ppm
ppm
°C
°C
ms
%
ppm
V
V
V
%
+2
+5
3.63
2.75
69
35
1
30
Vdd-0.7
Vdd-1.5
2.0
500
115
1.7
1.7
1.7
0.75
kHz
ppm
ppm
V
V
mA
mA
A
mA
V
V
V
ps
ns
ps
ps
ps
ps
Contact SiTime for 16 kHz or other high bandwidth options
Pin 1
25°C
25°C
Industrial
Extended Commercial
Contact SiTime for tighter duty cycle
See the last page for Absolute Pull Range, APR table
Vdd = 3.3V, Voltage at which maximum deviation is guaranteed
Vdd = 2.5V, Voltage at which maximum deviation is guaranteed
Voltage at which maximum deviation is guaranteed
Condition
LVPECL and LVDS, Common AC Characteristics
Inclusive of initial tolerance, operating temperature, rated
power, supply voltage and load change
±25, ±50, ±100, ±150,
±200, ±400, ±800, ±1600
3.2
2.4
Positive Slope
8
3.3
2.5
61
1.6
300
1.2
1.2
1.2
0.5
0.1
1
LVPECL, DC and AC Characteristics
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See Figure 1
See Figure 1
See Figure 1
20% to 80%
f = 220 MHz - For other frequencies, T_oe = 100ns + 3 period
f = 100 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Vdd = 3.3V or 2.5V
f = 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
RMS Phase Jitter (random)
T_phj
SiTime Corporation
Rev. 1.2
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised October 6, 2014

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