SiT1566
1.2mm
2
µPower, Low-Jitter, 3 & 5 ppm, 32.768 kHz Super-TCXO
Smallest (1.2mm
2
), Ultra-Low Power, 32.768 kHz MEMS TCXO
Features
Applications
32.768 kHz ±3 and ±5 ppm all-inclusive frequency stability
2
World’s smallest TCXO Footprint: 1.2 mm
1.5 x 0.8 mm CSP
No external bypass cap required
Improved stability reduces system power with fewer network
timekeeping updates
Low integrated phase jitter (IPJ) suitable for multiplying up for
portable audio: 2.5 ns
RMS
Ultra-low power: 4.5 µA
Operating supply voltage range: 1.62 V to 3.63 V
Operating temperature ranges: -20°C to +70°C, -40°C to +85°C
Pb-free, RoHS and REACH compliant
Smart watches, health and wellness monitors
Ultra-accurate RTC reference clock
Smart utility meters, E-meters
Internet-of-Things (IoT) with BLE
Electrical Specifications
Conditions: Min/Max limits are over temperature, Vdd = 1.8V ±10%, unless otherwise stated. Typicals are at 25°C and Vdd = 1.8V.
Table 1. Electrical Characteristics
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency and Stability
Output Frequency
Total Frequency Stability
[1]
Allan Deviation
First Year Frequency Aging
Fout
F_stab
AD
F_aging
-3
-5
1e-8
±1
32.768
3
5
4e-8
ppm
kHz
ppm
All inclusive, 1.62V to 3.63V
1 second averaging time
T
A
= 25°C, Vdd = 1.8V
Jitter and Frequency Response Performance
Integrated Phase Jitter
RMS Period Jitter
Peak-to-Peak Period Jitter
Dynamic Temperature
Frequency Response
IPJ
PJ
RMS
PJ
p-p
-0.5
1.8
2.5
20
2.5
4
35
+0.5
ns
RMS
ns
RMS
ns
p-p
ppm/sec
Under temp ramp up to 1.5°C/sec
Integration bandwidth = 100 Hz to 16.384 kHz.
Inclusive of 50 mV peak-to-peak sinusoidal noise on Vdd.
Noise frequency 100 Hz to 20 MHz.
10,000 samples, per JEDEC standard 65B
Supply Voltage and Current Consumption
Operating Supply Voltage
Supply Current
Start-up Time at Power-up
Vdd
Idd
t_start
1.62
1.62
4.5
1.8
1.98
3.63
5.3
300
V
µA
ms
No load
Measured when supply reaches 90% of final Vdd to the first
output pulse.
“C” ordering code
“I” ordering code
10 – 90% Vdd, 15pF load
Operating Temperature Range
Operating Temperature Range
Op_Temp
-20
-40
70
85
°C
°C
LVCMOS Output
Output Rise/Fall Time
Output Clock Duty Cycle
Output Voltage High
Output Voltage Low
tr, tf
DC
VOH
VOL
45
90%
10%
9
20
55
ns
%
Vdd
Vdd
I
OH
= -50 µA, 15 pF load
I
OL
= 50 µA, 15 pF load
Note:
1. Relative to 32.768 kHz, includes initial tolerance, over temp stability, Vdd, 20% load variation, hysteresis, board -level underfill (5ppm only), 2x reflow.
Tested with Agilent 53132A frequency counter. Measured with 100 ms gate time for accurate frequency measurement.
Rev 1.01
May 18, 2018
www.sitime.com
SiT1566
1.2mm
2
µPower, Low-Jitter, 3 & 5 ppm, 32.768 kHz Super-TCXO
Table 2. Pin Configuration
Pin
1
2
Symbol
NC
CLK Out
I/O
Internal Test
OUT
Functionality
Leave Floating. Do not connect to GND.
Oscillator clock output. LVCMOS compatible logic.
1.8V ±10% power supply. Under normal operating conditions,
Vdd does not require external bypass/decoupling capacitor(s).
SiT1566 includes on-chip filtering capacitors.
Under extreme noise on the supply, a 10-100 nF low ESR ceramic
bypass capacitor may be recommended close to the Vdd pin.
Connect to ground.
CSP Package (Top View)
CAL/NC
NC
1
4
GND
3
Vdd
Power Supply
CLK Out
2
3
Vdd
4
GND
Power Supply Ground
Figure 1. Pin Assignment
Table 3. Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameters
Continuous Power Supply Voltage Range (Vdd)
Continuous Maximum Operating Temperature Range
Short Duration Maximum Operating Temperature Range
Human Body Model (HBM) ESD Protection
Charge-Device Model (CDM) ESD Protection
Machine Model (MM) ESD Protection
Latch-up Tolerance
Mechanical Shock Resistance
Mechanical Vibration Resistance
1508 CSP Junction Temperature
Storage Temperature
Mil 883, Method 2002
Mil 883, Method 2007
≤ 30 minutes
JESD22-A114
JESD22-C101
TA = 25°C
JESD78 Compliant
20,000
70
150
-65 to 150
g
g
°C
°C
Test Conditions
Value
-0.5 to 4.0
105
125
2000
750
200
Unit
V
°C
°C
V
V
V
System Block Diagram
MEMS Resonator
GND
Control
Regulators
Vdd
Temp
Control
Temp-to-Digital
Prog
Prog
NVM
NC
Sustaining
Amp
Ultra-low
Power
Frac-n
PLL
Divider
Driver
GND
Figure 2. SiT1566 Block Diagram
Rev 1.01
Page 2 of 9
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SiT1566
1.2mm
2
µPower, Low-Jitter, 3 & 5 ppm, 32.768 kHz Super-TCXO
Description
SiT1566
is an ultra-small, micro-power 32.768 kHz TCXO
optimized for battery-powered applications. SiTime’s silicon
MEMS technology enables the first 32 kHz TCXO in the
world’s smallest footprint and chip-scale packaging (CSP).
Typical supply current is 4.5 µA under no load condition.
SiTime's MEMS oscillator consists of a MEMS resonator
and a programmable analog circuit. SiT1566 MEMS
resonator is built with SiTime’s unique MEMS First™
process. A key manufacturing step is EpiSeal™ during
which the MEMS resonator is annealed with temperatures
over 1000°C. EpiSeal creates an extremely strong, clean,
vacuum chamber that encapsulates the MEMS resonator
and ensures the best performance and reliability. During
EpiSeal, a poly silicon cap is grown on top of the resonator
cavity, which eliminates the need for additional cap wafers
or other exotic packaging. As a result, SiTime’s MEMS
resonator die can be used like any other semiconductor
die. One unique result of SiTime’s MEMS First and EpiSeal
manufacturing processes is the capability to integrate
SiTime’s MEMS die with a SOC, ASIC, microprocessor or
analog die within a package to eliminate external timing
components and provide a highly integrated, smaller,
cheaper solution to the customer.
Dynamic Temperature Frequency
Response
Dynamic Temperature Frequency Response is the rate of
frequency change during temperature ramps. This is an
important performance metric when the oscillator is
mounted near a high power component (e.g. SoC or power
management) that may rapidly change the temperature of
surrounding components.
For moderate temperature ramp rates (<2°C/sec), the
dynamic response is primarily determined by the steady-
state frequency vs. temperature of the device. The best
dynamic response is obtained from parts which have been
trimmed to be flat in frequency over temperature.
For high temperature ramp rates (>5°C/sec), the latency in
the temperature compensation loop contributes a larger
frequency error, which is dependent on the temperature
compensation update rate. This part achieves excellent
performance at the default 3Hz refresh update rate. This
device family supports faster update rates for further
reducing dynamic frequency error at the expense of slightly
increased current consumption. Other compensation
refresh rate options include 6 Hz, 12 Hz, and 24 Hz.
Contact
SiTime
for other options.
TCXO Frequency Stability
SiT1566 is factory calibrated (trimmed) over multiple
temperature points to guarantee extremely tight stability
over temperature. Unlike quartz crystals that have a
classic tuning fork parabola temperature curve with a
25°C turnover point with a 0.04 ppm/C2 temperature
coefficient, the SiT1566 temperature coefficient is
calibrated and corrected over temperature with an active
temperature correction circuit. The result is a 32 kHz
TCXO with extremely tight frequency variation over the
-40°C to +85°C temperature range.
When measuring the output frequency of SiT1566 with a
frequency counter, it is important to make sure the
counter's gate time is >100 ms. Shorter gate times may
lead to inaccurate measurements.
Rev 1.01
Page 3 of 9
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SiT1566
1.2mm
2
µPower, Low-Jitter, 3 & 5 ppm, 32.768 kHz Super-TCXO
Typical Operating Curves
(T
A
= 25°C, Vdd = 1.8V, unless otherwise stated)
Figure 3. Frequency Stability over Temperature
Figure 4. Supply Current over Temperature (No Load)
F
OUT
= 33 kHz
Internal Caps Charging
No Vdd bypass
Logic Start-up
NVM Read
OSC Start-up
Temperature
Compensation (13 µA)
Steady State
4.5
350ms
10 nF Vdd bypass
33 kHz
Figure 5. Start-up and Steady-State Current Profile
Figure 6. Power Supply Noise Rejection (PSNR)
Figure 7. LVCMOS Output Sing
Rev 1.01
Page 4 of 9
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SiT1566
1.2mm
2
µPower, Low-Jitter, 3 & 5 ppm, 32.768 kHz Super-TCXO
Dynamic Frequency Response for Moderate Temperature Ramps
Frequency accuracy under a moderate temperature ramp up to 2°C/sec is limited by the TCXO’s trimmed accuracy of the
frequency stability over-temperature.
Note:
2. Measured relative to 32.768 kHz.
Rev 1.01
[2]
Page 5 of 9
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